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58 Standard definitions depended on implementation order. Now, this should be solved.

minsoc_bench_defines.v: when setting reset to be positive (`define POSITIVE_RESET), NEGATIVE_RESET is undefined. This override the implementation order, so that independent of it, POSITIVE_RESET will be used.

minsoc_defines.v: when setting GENERIC_FPGA, FPGA_TAP and FPGA_CLOCK_DIVISION are undefined. This way, even if FPGA_TAP would come prior to GENERIC_TAP on the correspondent implementation, GENERIC_TAP would still be selected.

IMPORTANT: GENERIC_MEMORY must still be implemented first on minsoc_onchip_ram.v, because FPGA's memory is automatically selected from other definitions and cannot be undefined a priori. Since some other memory types can be selected, there is no trivial solution. However, this shouldn't be a big problem, since the beginning of this file will probably not be modified.
rfajardo 4041d 06h /minsoc/
57 If a FPGA manufacturer is selected, the FPGA families of other manufacturers are automatically ignored.

Some updated to comments.

CLOCK_DIVISOR back to 5. The number does not matter much, but 1 is a bad standard number, since it should never be selected. Comment says, use NO_CLOCK_DIVISION instead.

Changing standard FPGA back to Xilinx and Spartan3A. I'm only doing this because the synthesis examples page of wiki still assume this FPGA to be standardly selected.
rfajardo 4041d 06h /minsoc/
56 Macros for all Altera family devices and pll instantiation javieralso 4048d 05h /minsoc/
55 Adjusting Makefiles to compile correctly with new firmware updates.

1) except.o not included into libsupport.a.
2) libsupport.a linked to except.o, now in correct order: ld libsupport.a except.o -o executable (not the other way around)
3) int.c was not being compiled because of a #ifdef which is not set anywhere
rfajardo 4049d 13h /minsoc/
54 Moving spr_defs.h to or1200.h ConX. 4049d 15h /minsoc/
53 Indentation, deleting redundant files and adding externals ConX. 4049d 16h /minsoc/
52 Altera ALTPLL Megafunction Instantiation javieralso 4058d 07h /minsoc/
51 sw/support/uart.c: Changing the order of writes to the Divisor Latch of UART. (Thanks Ramkumar) rfajardo 4064d 19h /minsoc/
50 Removing unused firmware files, respective to or1ksim actually.

Removing the inclusion of the removed file mc.h in reset.S, probably required by or1ksim at some point.

Reworked except.S to use a macro instead of repeating the same procedure 16 times or so. Explanation added to the macro as a leading comment.
rfajardo 4076d 16h /minsoc/
49 Language correction for README.txt. rfajardo 4078d 13h /minsoc/

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