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[/] [minsoc/] [branches/] [rc-1.0/] [backend/] [altera_3c25_board/] - Rev 97

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97 As proposed by Javier Almansa automatically generated project files for simulation and synthesis are out of revision control. Instead, the backend configure scripts run the prj/Makefile now to generate the project files prior to configuration of SoC for a specific board. rfajardo 3945d 07h /minsoc/branches/rc-1.0/backend/altera_3c25_board/
96 Some files needed for Altera synthesis javieralso 3945d 18h /minsoc/branches/rc-1.0/backend/altera_3c25_board/
95 Makefile for Altera FPGAs fixed javieralso 3946d 21h /minsoc/branches/rc-1.0/backend/altera_3c25_board/
93 Support for Altera synthesis. It needs some tune, but it works fine javieralso 3949d 08h /minsoc/branches/rc-1.0/backend/altera_3c25_board/

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