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[/] [minsoc/] [branches/] [rc-1.0/] [backend/] [altera_3c25_board/] [configure] - Rev 97

Rev	Log message	Author	Age	Path
97	As proposed by Javier Almansa automatically generated project files for simulation and synthesis are out of revision control. Instead, the backend configure scripts run the prj/Makefile now to generate the project files prior to configuration of SoC for a specific board.	rfajardo	4602d 15h	/minsoc/branches/rc-1.0/backend/altera_3c25_board/configure
96	Some files needed for Altera synthesis	javieralso	4603d 02h	/minsoc/branches/rc-1.0/backend/altera_3c25_board/configure
95	Makefile for Altera FPGAs fixed	javieralso	4604d 05h	/minsoc/branches/rc-1.0/backend/altera_3c25_board/configure
93	Support for Altera synthesis. It needs some tune, but it works fine	javieralso	4606d 16h	/minsoc/branches/rc-1.0/backend/altera_3c25_board/configure