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[/] [minsoc/] [branches/] [rc-1.0/] [prj/] [scripts/] [xilinxxst.sh] - Rev 109

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109 Creating a branche for release candidate 1.0. rfajardo 3906d 01h /minsoc/branches/rc-1.0/prj/scripts/xilinxxst.sh
108 Scripts updates to correct paths when working under Windows. Now, ModelSim, Xilinx and Altera synthesis are working on Windows through batch files.

Icarus Verilog and Altera synthesis are working as well. Job done!
rfajardo 3906d 04h /minsoc/branches/rc-1.0/prj/scripts/xilinxxst.sh
88 Project structure, Xilinx Makefiles and simulation working. rfajardo 3956d 04h /minsoc/branches/rc-1.0/prj/scripts/xilinxxst.sh
85 Central project definition under prj. Synthesis and simulation take their project files from here. rfajardo 3956d 06h /minsoc/branches/rc-1.0/prj/scripts/xilinxxst.sh

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