OpenCores
URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

Subversion Repositories minsoc

[/] [minsoc/] [branches/] [rc-1.0/] [sw/] [support/] [int.c] - Rev 112

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
109 Creating a branche for release candidate 1.0. rfajardo 4558d 15h /minsoc/branches/rc-1.0/sw/support/int.c
55 Adjusting Makefiles to compile correctly with new firmware updates.

1) except.o not included into libsupport.a.
2) libsupport.a linked to except.o, now in correct order: ld libsupport.a except.o -o executable (not the other way around)
3) int.c was not being compiled because of a #ifdef which is not set anywhere
rfajardo 4747d 21h /minsoc/branches/rc-1.0/sw/support/int.c
53 Indentation, deleting redundant files and adding externals ConX. 4748d 00h /minsoc/branches/rc-1.0/sw/support/int.c
11 External interrupt processing was being run multiple times because:
-external level interrupts have to be cleared
-internal interrupt status register has to be cleared
Since internal interrupt status register was being cleared before external level interrupts clearance, these internal interrupt status was being overwritten inbetween.

Solution:
-move status register reset to end of interrupt handler instead of beginning.

Testbench signal uart_srx initialized now.
rfajardo 5291d 20h /minsoc/branches/rc-1.0/sw/support/int.c
2 First commit of project. Beta status:
-testbench: working
-firmware: working
-RTL: Working for: Xilinx Spartan-3A DSP Development Kit
rfajardo 5326d 23h /minsoc/branches/rc-1.0/sw/support/int.c

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.