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[/] [minsoc/] [tags/] [release-0.9/] [rtl/] [verilog/] [minsoc_clock_manager.v] - Rev 42

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42 Tagging release 0.9 of MinSoC. rfajardo 4165d 02h /minsoc/tags/release-0.9/rtl/verilog/minsoc_clock_manager.v
2 First commit of project. Beta status:
-testbench: working
-firmware: working
-RTL: Working for: Xilinx Spartan-3A DSP Development Kit
rfajardo 4708d 05h /minsoc/tags/release-0.9/rtl/verilog/minsoc_clock_manager.v

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