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Rev Log message Author Age Path
172 Reverting changes to tag. Tags should never be changed. rfajardo 3006d 01h /minsoc/tags/release-1.0/utils/
171 Script for Minsoc deployment javieralso 3034d 07h /minsoc/tags/release-1.0/utils/
169 Changed all links to to solve the issues caused by ConX. 3074d 04h /minsoc/tags/release-1.0/utils/
151 Creating tag release-1.0 from revision 150 of branches/rc-1.0. rfajardo 3453d 09h /minsoc/tags/release-1.0/utils/
150 Updating installation script to retrieve minsoc from tags/release-1.0. rfajardo 3453d 09h /minsoc/branches/rc-1.0/utils/
147 Updating minsoc_bench.v to correctly acquire uart data.

Uart drivers: when an end of line character was sent, the driver appended a carriage return to it. This is not necessary and has been removed.
-Eth and Uart firmwares also had a carriage return after the end of line, also removed.

Minsoc_bench_defines.v: Renaming VCD_OUTPUT define to WAVEFORM_OUTPUT

run_bench: selecting -lxt2 for waveform output format. This output format size is 10 times smaller than vcd. lxt2 output format requires that Icarus Verilog be installed with zlib support. For that, we now check if zlib is supported on script run.
rfajardo 3458d 07h /minsoc/branches/rc-1.0/utils/
143 Compiling firmwares in board configuration scripts instead of on global minsoc setup. rfajardo 3459d 08h /minsoc/branches/rc-1.0/utils/
138 DIR_TO_INSTALL creation using wizard ConX. 3459d 22h /minsoc/branches/rc-1.0/utils/
136 Installation on Ubuntu-11.10 has shown that a binary called makeinfo is required to install GDB. This binary can be installed on Ubuntu by installing the package texinfo. rfajardo 3467d 04h /minsoc/branches/rc-1.0/utils/
122 Renaming to rfajardo 3484d 22h /minsoc/branches/rc-1.0/utils/
121 Asserting svn:executable properties of modelsim/*.bat scripts.

Including corrected patch for advanced debug system watchpoints under utils/setup. Configure script updated to use this instead of advanced debug system patches. This will remain so until the patch is corrected. The previous line still has the correct command.
rfajardo 3485d 00h /minsoc/branches/rc-1.0/utils/
115 script dir aware. logging to script dir.
rfajardo 3485d 05h /minsoc/branches/rc-1.0/utils/
114 Installation and Configuration scripts can be run out of any directory.
They assume they are going to process the files and directories found in the directory they are run from.
rfajardo 3485d 05h /minsoc/branches/rc-1.0/utils/
113 &
-aware of location of script
-does not block on patch error

spartan3e_starter_kit & spartan3e_starter_kit_eth:
-or1200_defines.v updated

-src/blackboxes/or1200_top.v adjusted to or1200_rel1
-Makefile had a typo regarding altera vhdl files
rfajardo 3485d 05h /minsoc/branches/rc-1.0/utils/
112 Updating installation & configuration scripts. rfajardo 3485d 21h /minsoc/branches/rc-1.0/utils/
111 DIR_TO_INSTALL is required before using rfajardo 3485d 21h /minsoc/branches/rc-1.0/utils/
110 Fixing several minor issues with the system:
-minsoc-install splitted into installation and configuration can be used to configure a fresh checked out system
-configure script used by both and to configure

-rtl/verilog: svn externals fixed
-or1200 rolled back to release-1.0

-Makefile has been used by simulation to differentiate project definition of vhdl and verilog files
-Altera was differentiating it in script
-now there are two scripts, one for vhdl and another for verilog. The differentiation occurs in Makefile as for simulation.
-altera_3c25_board/configure scripts had to be updated, vprj and vhdprj file extensions used to differentiate Verilog and VHDL project files.

-prj/src: or1200_top.prj downdated to definition of or1200_v1
rfajardo 3485d 22h /minsoc/branches/rc-1.0/utils/
109 Creating a branche for release candidate 1.0. rfajardo 3485d 23h /minsoc/branches/rc-1.0/utils/
106 Installation script was checking the ENV variable before setting it. rfajardo 3486d 08h /minsoc/trunk/utils/
103 But the file is called gdb-6.8a.tar.bz2, so tar must be run on that name. rfajardo 3496d 00h /minsoc/trunk/utils/

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