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[/] [minsoc/] [tags/] [release-1.0/] [utils/] [setup/] [minsoc-setup.sh] - Rev 171

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Rev Log message Author Age Path
151 Creating tag release-1.0 from revision 150 of branches/rc-1.0. rfajardo 3219d 07h /minsoc/tags/release-1.0/utils/setup/minsoc-setup.sh
122 Renaming minsoc-configure.sh to minsoc-setup.sh. rfajardo 3250d 20h /minsoc/tags/release-1.0/utils/setup/minsoc-setup.sh
114 Installation and Configuration scripts can be run out of any directory.
They assume they are going to process the files and directories found in the directory they are run from.
rfajardo 3251d 03h /minsoc/tags/release-1.0/utils/setup/minsoc-setup.sh
113 minsoc-install.sh & minsoc-configure.sh:
-aware of location of configure.sh script
configure.sh:
-does not block on patch error

spartan3e_starter_kit & spartan3e_starter_kit_eth:
-or1200_defines.v updated

prj:
-src/blackboxes/or1200_top.v adjusted to or1200_rel1
-Makefile had a typo regarding altera vhdl files
rfajardo 3251d 04h /minsoc/tags/release-1.0/utils/setup/minsoc-setup.sh
112 Updating installation & configuration scripts. rfajardo 3251d 19h /minsoc/tags/release-1.0/utils/setup/minsoc-setup.sh
110 Fixing several minor issues with the system:
-minsoc-install splitted into installation and configuration
-minsoc-configure.sh can be used to configure a fresh checked out system
-configure script used by both minsoc-configure.sh and minsoc-install.sh to configure

-rtl/verilog: svn externals fixed
-or1200 rolled back to release-1.0

-prj/scripts:
-Makefile has been used by simulation to differentiate project definition of vhdl and verilog files
-Altera was differentiating it in script
-now there are two scripts, one for vhdl and another for verilog. The differentiation occurs in Makefile as for simulation.
-altera_3c25_board/configure scripts had to be updated, vprj and vhdprj file extensions used to differentiate Verilog and VHDL project files.

-prj/src: or1200_top.prj downdated to definition of or1200_v1
rfajardo 3251d 20h /minsoc/tags/release-1.0/utils/setup/minsoc-setup.sh

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