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[/] [minsoc/] [trunk/] [rtl/] [verilog/] [minsoc_startup/] - Rev 7

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2 First commit of project. Beta status:
-testbench: working
-firmware: working
-RTL: Working for: Xilinx Spartan-3A DSP Development Kit
rfajardo 3734d 02h /minsoc/trunk/rtl/verilog/minsoc_startup/

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