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[/] [mod_sim_exp/] [tags/] [Release_1.1/] - Rev 87

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29 added software for generation of test input for the tesbenches JonasDC 3743d 00h /mod_sim_exp/tags/Release_1.1/
28 updated makefile for new pipeline sources JonasDC 3743d 01h /mod_sim_exp/tags/Release_1.1/
27 test input values for multiplier_tb JonasDC 3743d 01h /mod_sim_exp/tags/Release_1.1/
26 testbench for only the montgommery multiplier JonasDC 3743d 01h /mod_sim_exp/tags/Release_1.1/
25 first version of new pipeline design. allows for more flexibility in nr of stages.
does not support split pipeline support yet. currently only works for single pipeline
JonasDC 3743d 01h /mod_sim_exp/tags/Release_1.1/
24 changed names of top-level module to mod_sim_exp_core JonasDC 3746d 10h /mod_sim_exp/tags/Release_1.1/
23 added descriptive comments JonasDC 3746d 11h /mod_sim_exp/tags/Release_1.1/
22 updated the systolic pipeline with descriptive signal names and comments JonasDC 3749d 04h /mod_sim_exp/tags/Release_1.1/
21 changed x_i signal to xi JonasDC 3750d 12h /mod_sim_exp/tags/Release_1.1/
20 added comments, changed signal name of x_reg_i to x_reg.
File is now according to OC design rules
JonasDC 3750d 12h /mod_sim_exp/tags/Release_1.1/

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