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[/] [mod_sim_exp/] [trunk/] - Rev 64

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Rev Log message Author Age Path
64 added synthesis reports of xilinx and altera JonasDC 4073d 23h /mod_sim_exp/trunk/
63 now using a generic description of the ram for the memory. the core now should synthesize for al fpga's, no device specific code anymore. tested and synthesizes for altera and xilinx JonasDC 4073d 23h /mod_sim_exp/trunk/
62 not used anymore JonasDC 4074d 02h /mod_sim_exp/trunk/
61 updated comments, added optional altera constraint JonasDC 4074d 02h /mod_sim_exp/trunk/
60 generic version of the fifo, not device specific anymore, uses dpram_generic
updated comments of RAM templates.		 JonasDC 4076d 16h /mod_sim_exp/trunk/
59 added templates that correctly infer RAM, for dual port en true dual port RAM
added general functions file, (used in the two RAM templates)		 JonasDC 4076d 17h /mod_sim_exp/trunk/
55 updated resource usage in comments JonasDC 4080d 16h /mod_sim_exp/trunk/
54 generic fifo design: correctrly inferred by xilinx and altera JonasDC 4080d 16h /mod_sim_exp/trunk/
53 correctly inferred ram for altera dual port ram JonasDC 4080d 23h /mod_sim_exp/trunk/
52 correct inferring of blockram, no additional resources. JonasDC 4080d 23h /mod_sim_exp/trunk/
51 true dual port ram for xilinx JonasDC 4081d 00h /mod_sim_exp/trunk/
50 added folder for ram descriptions
added experimental simple dual port ram implementation for xilinx		 JonasDC 4081d 00h /mod_sim_exp/trunk/
47 added documentation for the IP core. JonasDC 4161d 00h /mod_sim_exp/trunk/
46 chance run_auto port or mod_sim_exp_core to exp_m JonasDC 4161d 00h /mod_sim_exp/trunk/
45 chance run_auto port or mod_sim_exp_core to exp_m JonasDC 4161d 00h /mod_sim_exp/trunk/
44 toplevel of the Modular Simultaneous Exponentiation IP core for the PLB interface JonasDC 4164d 17h /mod_sim_exp/trunk/
43 made the core parameters generics JonasDC 4164d 17h /mod_sim_exp/trunk/
42 corrected wrong library name for mod_sim_exp_pkg JonasDC 4171d 01h /mod_sim_exp/trunk/
41 removed deprecated files from version control JonasDC 4171d 01h /mod_sim_exp/trunk/
40 adjusted core instantiation to new core module name JonasDC 4179d 05h /mod_sim_exp/trunk/

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