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[/] [mod_sim_exp/] [trunk/] [rtl/] [vhdl/] [interface/] [axi/] - Rev 86


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Rev Log message Author Age Path
86 update on previous JonasDC 3809d 08h /mod_sim_exp/trunk/rtl/vhdl/interface/axi/
85 changed so that reset now also affects slave register JonasDC 3809d 08h /mod_sim_exp/trunk/rtl/vhdl/interface/axi/
84 AXI-Lite interface updated, now tested and verified on Xilinx FPGA
renamed C_DEVICE parameter, because of conflicts with restricted parameter in xilinx XPS
JonasDC 3810d 17h /mod_sim_exp/trunk/rtl/vhdl/interface/axi/
82 added first version of axi-lite interface and testbench for basic axi-lite operations, now under test JonasDC 3829d 14h /mod_sim_exp/trunk/rtl/vhdl/interface/axi/

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