OpenCores
URL https://opencores.org/ocsvn/mod_sim_exp/mod_sim_exp/trunk

Subversion Repositories mod_sim_exp

[/] - Rev 52

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
52 correct inferring of blockram, no additional resources. JonasDC 3631d 17h /
51 true dual port ram for xilinx JonasDC 3631d 17h /
50 added folder for ram descriptions
added experimental simple dual port ram implementation for xilinx
JonasDC 3631d 17h /
49 First full stable version with documentation.
Includes flexible pipeline design, PLB interface and the RAM and FIFO is still using xilinx primitives.
JonasDC 3643d 12h /
48 Tag of the starting version of the project JonasDC 3643d 13h /
47 added documentation for the IP core. JonasDC 3711d 17h /
46 chance run_auto port or mod_sim_exp_core to exp_m JonasDC 3711d 17h /
45 chance run_auto port or mod_sim_exp_core to exp_m JonasDC 3711d 17h /
44 toplevel of the Modular Simultaneous Exponentiation IP core for the PLB interface JonasDC 3715d 11h /
43 made the core parameters generics JonasDC 3715d 11h /
42 corrected wrong library name for mod_sim_exp_pkg JonasDC 3721d 19h /
41 removed deprecated files from version control JonasDC 3721d 19h /
40 adjusted core instantiation to new core module name JonasDC 3729d 23h /
39 changed files to remove warnings from synthesis
last cell logic is simplified because of redundant logic
JonasDC 3730d 10h /
38 deprecated design files because of new pipeline structure, will be removed shortly JonasDC 3730d 15h /
37 changed names of some generics of the multiplier.
moved the parameters for the core to the package of the core
testbench now uses this parameters to adapt to different bit widths

and new systolic pipeline now supports split or single pipeline
JonasDC 3734d 12h /
36 found bug in new pipeline structure, now working properly. (tested in sim)
mod_sim_exp_core uses new flexible pipeline as default.
JonasDC 3735d 09h /
35 new test values, 1st exponentiation gives error on result with new pipeline
commit for test purposes
JonasDC 3735d 11h /
34 operand memory now supports custom operand widths, the internal memory stays the fixed 1536 bit, but the bus width is now adjustable to any size below. JonasDC 3735d 12h /
33 default pipeline changed to old version, there seems to be an occasional error with new version. JonasDC 3735d 15h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2023 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.