URL https://opencores.org/ocsvn/mod_sim_exp/mod_sim_exp/trunk

Subversion Repositories mod_sim_exp

[/] - Rev 54

Rev	Log message	Author	Age	Path
34	operand memory now supports custom operand widths, the internal memory stays the fixed 1536 bit, but the bus width is now adjustable to any size below.	JonasDC	4180d 10h	/
33	default pipeline changed to old version, there seems to be an occasional error with new version.	JonasDC	4180d 12h	/
32	new systolic pipeline structure now has split pipeline support, tested and verified in simulation. the core now uses this pipeline by default.	JonasDC	4180d 13h	/
31	put first cell logic of the pipeline in a separate design unit, tested and working	JonasDC	4180d 19h	/
30	put last cell logic of the pipeline in a separate design unit, tested and working	JonasDC	4180d 19h	/
29	added software for generation of test input for the tesbenches	JonasDC	4181d 08h	/
28	updated makefile for new pipeline sources	JonasDC	4181d 09h	/
27	test input values for multiplier_tb	JonasDC	4181d 09h	/
26	testbench for only the montgommery multiplier	JonasDC	4181d 09h	/
25	first version of new pipeline design. allows for more flexibility in nr of stages. does not support split pipeline support yet. currently only works for single pipeline	JonasDC	4181d 09h	/