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[/] [open8_urisc/] [trunk/] - Rev 179

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Rev Log message Author Age Path
179 Replacing files accidentally deleted during check-in jshamlet 2109d 07h /open8_urisc/trunk/
178 Adding Open8 toolset for pure assembly jshamlet 2109d 07h /open8_urisc/trunk/
177 Fixed comments in RTC module jshamlet 3419d 12h /open8_urisc/trunk/
176 Fixed documentation errors,
Modified uSec_Tick such that it is always generated regardless of the interval.		 jshamlet 3424d 09h /open8_urisc/trunk/
175 Added 4 and 8-bit LCD interfaces with backlight and contrast DACs jshamlet 3424d 14h /open8_urisc/trunk/
174 Added ROM/RAM wrappers jshamlet 3619d 09h /open8_urisc/trunk/
173 Added a couple of useful interfaces for detecting button presses and clock changes. jshamlet 3619d 09h /open8_urisc/trunk/
172 General code cleanup jshamlet 3619d 09h /open8_urisc/trunk/
171 Fixed comments for offsets 0x0 - 0x3 to indicate the read value jshamlet 3619d 09h /open8_urisc/trunk/
170 Added 24-bit resolution epoch timer / alarm clock jshamlet 3619d 09h /open8_urisc/trunk/
169 Corrected issue with CMP and SBC generating an inverted carry flag and added new constants to the package file to simplify interfacing new modules. jshamlet 3674d 10h /open8_urisc/trunk/
168 Simplified write data path logic,
Converted RTC to packed BCD,
Corrected several bugs in real time clock component,		 jshamlet 4453d 06h /open8_urisc/trunk/
167 Updated CPU model; Pipelined ALU control signals to improve fMAX, corrected issue with interrupt controller priority not being obeyed, fixed bug in auto-indexing instructions where the upper register wasn't being properly incremented, cleaned up code to make the processor model easier to follow.
Added several useful modules that use the Open8 bus.		 jshamlet 4461d 05h /open8_urisc/trunk/
166 fixed additional issues with range checking on PCREL relocations for open8, added test cases to verify, catch tree up with binutils datestamp 20120301 khays 5025d 06h /open8_urisc/trunk/
165 fixed issues with PC relative fixups in the linker khays 5026d 13h /open8_urisc/trunk/
164 Modified the data path to allow the bus to go idle while waiting for an interrupt. This makes it easier to debug code that uses the WAI instruction, as both Wr_Enable and Rd_Enable go low. jshamlet 5097d 00h /open8_urisc/trunk/
163 sync with binutils 2.22.51.20111114 khays 5134d 12h /open8_urisc/trunk/
162 Added optional generic to specify that the BRK instruction implements a WAit_for_Interrupt (WAI) instruction instead. Logically emulates INT, but without triggering a soft interrupt. Note that the NOP instruction maps to BRK, and will not function correctly if this option is set. jshamlet 5187d 17h /open8_urisc/trunk/
161 synchronize binutils/ with gnu dev tree of 2.21.53.20110828 khays 5211d 12h /open8_urisc/trunk/
160 synchronize binutils/gas with gnu dev tree of 2.21.53.20110828 khays 5211d 12h /open8_urisc/trunk/

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