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[/] [open8_urisc/] [trunk/] - Rev 253

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Rev Log message Author Age Path
233 Updated the Sample Projects.zip jshamlet 1815d 06h /open8_urisc/trunk/
232 More code cleanup on sample projects. SDLC2LCD should now match the Open8_II project model. jshamlet 1824d 10h /open8_urisc/trunk/
231 Updated sample projects and added elapsed time capture (chronometer) module jshamlet 1824d 10h /open8_urisc/trunk/
230 Added two sample projects that show how to connect and program an Open8 system jshamlet 1827d 21h /open8_urisc/trunk/
229 Created a new version of the system timer with 24-bit, 1-uS resolution. The new timer has a much different register interface, so it is now o8_sys_timer_ii. jshamlet 1828d 07h /open8_urisc/trunk/
228 Added an initialization constant for the OPEN8_BUS_TYPE record. jshamlet 1828d 21h /open8_urisc/trunk/
227 Added a demonstration Open8_cfg.vhd file, which is used to configure the system constants. It also provides a function that makes it easy to merge read buses. jshamlet 1829d 05h /open8_urisc/trunk/
226 Forgot the updated package file... jshamlet 1829d 08h /open8_urisc/trunk/
225 Added Halt_Ack to go with Halt_Req. jshamlet 1829d 08h /open8_urisc/trunk/
224 Finished new Open8 bus record, which now includes the clock, reset and a microsecond tick. The CPU now accepts a clock and pll_locked signal, which it uses to generate the system reset in the bus record. It also contains a simple microsecond counter to feed the usec_tick in the record. This logic was removed from the real time clock and system timer entities, which now use the global version. Bus connections should be dramatically simplified, as only the read logic and interrupts are still run as separate signals. jshamlet 1829d 10h /open8_urisc/trunk/

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