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[/] [open8_urisc/] [trunk/] - Rev 332

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Rev Log message Author Age Path
332 Added initial version of task manager project jshamlet 621d 03h /open8_urisc/trunk/
331 Added custom SPI LCD interface (pending receive side) and watchdog timer. Also modified system timer II to use aliases jshamlet 621d 03h /open8_urisc/trunk/
330 Updated to route RAM write fault signal and force CPU interrupts to task manager requirements. jshamlet 627d 10h /open8_urisc/trunk/
329 Added a core that specifically supports the task switcher software. It merges o8_int_mgr16 with a wide register, allowing full control of I/O peripherals by the task switcher software. This also allows the task switcher to be enabled for the full 16 I/O write qualification lines, which had previously only been supported in the task data setup. jshamlet 627d 11h /open8_urisc/trunk/
328 Documentation cleanup. Also added operand definitions. jshamlet 628d 08h /open8_urisc/trunk/
327 More bug fixes:
Added write qual line to LTC2355 interface, fixed bug where output data was duplicating the lower byte in the averager, added an initial romtape.hex file		 jshamlet 628d 13h /open8_urisc/trunk/
326 Minor comment correction jshamlet 634d 10h /open8_urisc/trunk/
325 Added the rest of the initializers to the signal assignments jshamlet 634d 11h /open8_urisc/trunk/
324 Modified the Open8 version of the multi-channel roll average code to have separate interrupt enables for average and flush operations. Note that the flush status bit should be checked by software prior to use if the Autoflush_On_Reset generic is set TRUE.

Also adding the ROMTAPE entity, which acts as a serial-access ROM for storing strings, arrays, etc. in order to alleviate pressure on the primary program ROM. It is intended for use with loops that load fixed content from ROM.		 jshamlet 634d 11h /open8_urisc/trunk/
323 Forgot to add files jshamlet 635d 10h /open8_urisc/trunk/
322 Performance fixes for the LCD interface,
Fixed incorrect entity name for the dual LTC2355 IF,
Added a CPU-accessible 8-channel averager core and FIFO-style ROM		 jshamlet 635d 10h /open8_urisc/trunk/
321 Fixed issue with parity flag in receiver sticking jshamlet 739d 03h /open8_urisc/trunk/
320 Inverted flow control signals to match EIA-232 specification jshamlet 741d 06h /open8_urisc/trunk/
319 Fixed off-by-one error in channel count jshamlet 742d 09h /open8_urisc/trunk/
318 Added o8_scale_conv.vhd and intdiv.vhd jshamlet 746d 11h /open8_urisc/trunk/
317 Altered the reinit signal on teh adc128s022.vhd driver to be optional, and removed the "dead" signal from the upper level o8_de0_nano_adc_if.vhd code. jshamlet 760d 08h /open8_urisc/trunk/
316 More code cleanup and comments,
Removed INT_VECTOR_n constants, as they are superfluous. There are no reasonable situations in which the constants would be altered.		 jshamlet 760d 08h /open8_urisc/trunk/
315 Added Terasic DE0 Nano ADC interface and rolling averager. jshamlet 760d 09h /open8_urisc/trunk/
314 Code cleanup and added comments jshamlet 760d 10h /open8_urisc/trunk/
313 Added all generics to package component jshamlet 760d 11h /open8_urisc/trunk/

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