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[/] [open8_urisc/] [trunk/] [VHDL/] - Rev 160

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Rev Log message Author Age Path
156 Optimized for timing,
Flattened block structure to single entity.
jshamlet 4855d 08h /open8_urisc/trunk/VHDL/
155 Fixed additional interrupt logic bug,
Optimized several blocks - including ALU, stack, program counter, and data path.
jshamlet 4856d 03h /open8_urisc/trunk/VHDL/
154 Fixed problem with missing data path override in interrupt logic. Should resolve issues with processor crashing when an interrupt occurs as a STO instruction is being executed. jshamlet 4861d 06h /open8_urisc/trunk/VHDL/
153 Fixed bug in interrupt logic that caused stack pointer to increment if interrupt occurred as specific instructions were being decoded,
Fixed bug in interrupt logic where instruction caching would remain enabled during an interrupt, causing improper execution depending on what instruction was in the decode stage as the interrupt is trigered.
jshamlet 4888d 02h /open8_urisc/trunk/VHDL/
151 Fixed STO instruction and interrupt logic to avoid address bus corruption issues. jshamlet 4898d 05h /open8_urisc/trunk/VHDL/
10 corrected implementation for BTT to match V8/ARClite definition, changed sense of reset, corrected comments to match source values khays 5039d 13h /open8_urisc/trunk/VHDL/
8 Need to learn SVN... jshamlet 5368d 01h /open8_urisc/trunk/VHDL/
7 Initial Upload jshamlet 5368d 01h /open8_urisc/trunk/open8_urisc/VHDL/

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