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[/] [open8_urisc/] [trunk/] [VHDL/] [fifo_1k_core.vhd] - Rev 207

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207 Added a simple 8-bit, fixed asynchronous serial interface with compile time settable bit-rate, parity enable, and parity mode generics. jshamlet 1669d 03h /open8_urisc/trunk/VHDL/fifo_1k_core.vhd

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