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[/] [open8_urisc/] [trunk/] [VHDL/] [o8_crc16_ccitt.vhd] - Rev 223

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223 Added an OPEN8_BUS_TYPE record to simplify connection to Open8 modules. The CPU now passes and Open8_Bus out, which supplies the bus address, write enable, write data, and read enable. Read data and interrupts are still handled as separate signals, since they are muxed/connected at the next level up. jshamlet 1700d 14h /open8_urisc/trunk/VHDL/o8_crc16_ccitt.vhd
213 Code and comment cleanup jshamlet 1705d 16h /open8_urisc/trunk/VHDL/o8_crc16_ccitt.vhd
194 Cleaned up licensing sections jshamlet 1715d 16h /open8_urisc/trunk/VHDL/o8_crc16_ccitt.vhd
191 Cleaned up comments, added back the OPEN8_NULLBUS constant, and added some new modules for ADCs and LCD displays.
Also made the button input module more configurable by moving the debounce code to a separate entity and using generics to instantiate it.
jshamlet 1715d 17h /open8_urisc/trunk/VHDL/o8_crc16_ccitt.vhd
180 Added additional Open8 compatible modules jshamlet 1740d 17h /open8_urisc/trunk/VHDL/o8_crc16_ccitt.vhd

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