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[/] [open8_urisc/] [trunk/] [VHDL/] [o8_sdlc_if.vhd] - Rev 200

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Rev Log message Author Age Path
200 Renamed dual-port buffer to match other entities. jshamlet 1713d 11h /open8_urisc/trunk/VHDL/o8_sdlc_if.vhd
199 Added monitor ram for debugging and fixed issue with dual-port read path. jshamlet 1713d 11h /open8_urisc/trunk/VHDL/o8_sdlc_if.vhd
198 Removed debugging memory jshamlet 1713d 19h /open8_urisc/trunk/VHDL/o8_sdlc_if.vhd
196 Modified the update logic to allow direct writes to offset 0xFE for refreshing the clock status. This way, any write to the clock status register will immediately be undone. (Writing 0x00 to offset 0xFF is once-more ignored) jshamlet 1713d 20h /open8_urisc/trunk/VHDL/o8_sdlc_if.vhd
192 Added SDLC packet engine jshamlet 1714d 15h /open8_urisc/trunk/VHDL/o8_sdlc_if.vhd

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