OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] - Rev 152

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
152 Changes to allow building from unified source tree, to facilitate newlib integration and to fix a bug in the machine definition for OR32. jeremybennett 5485d 13h /openrisc/
151 OR1200 rel3 (added some files that were not checked-in earlier) marcus.erlandsson 5487d 06h /openrisc/
150 removed Linux directories marcus.erlandsson 5487d 14h /openrisc/
149 Initial commit of the GCC test suite jeremybennett 5488d 16h /openrisc/
148 The port of newlib for OpenRISC. This version just works with Or1ksim. There is code for a UART based version, but that needs some more work.

This allows GCC to be tested using Or1ksim.		 jeremybennett 5489d 06h /openrisc/
147 Integration of Or1ksim as a GDB simulator. jeremybennett 5489d 07h /openrisc/
146 Restructured Or1k implementation. Now works without frame pointer, using unified code approach. jeremybennett 5489d 07h /openrisc/
145 Fixed bug in data structure initialization. jeremybennett 5489d 07h /openrisc/
144 Missing file to fix bug 1797. jeremybennett 5489d 09h /openrisc/
143 Fix building for Cygwin with GCC 3.4.4 (Bug 1797). Fix breakpoints with instruction cache enabled (Bug 195). jeremybennett 5489d 11h /openrisc/
142 added OpenRISC version rel3 marcus.erlandsson 5489d 14h /openrisc/
141 added OpenRISC version rel3 marcus.erlandsson 5489d 14h /openrisc/
140 Changes to ORPMon, probably broke flash loading, improved TFTP julius 5490d 14h /openrisc/
139 added rel3 info in tags-directory, to avoid misunderstanding marcus.erlandsson 5491d 12h /openrisc/
138 fixed check-in mistake (remove additional directory level) marcus.erlandsson 5491d 13h /openrisc/
137 Release-2 of the OR1200 processor, latest version is always located in trunk-directory marcus.erlandsson 5491d 14h /openrisc/
136 Adding crossbild script, updating MOF install script to use or1ksim-0.4.0 julius 5492d 10h /openrisc/
135 Tagging the 0.4.0 stable release of Or1ksim jeremybennett 5497d 15h /openrisc/
134 Updates for stable release 0.4.0 jeremybennett 5497d 15h /openrisc/
133 Patches for floating point support jeremybennett 5501d 11h /openrisc/
132 This fixes files formatted with DOS line endings (something that should be sorted out outside SVN). jeremybennett 5501d 11h /openrisc/
131 This brings the OpenRISC repository for GDB 6.8 into line with the patched
tool which is distributed. Missing Makefile.in and configure files are added.		 jeremybennett 5501d 11h /openrisc/
130 Updating uclibc patch julius 5502d 14h /openrisc/
129 Previous commit was before saving file. jeremybennett 5503d 11h /openrisc/
128 Tagging the 0.4.0rc2 candidate release of Or1ksim jeremybennett 5503d 11h /openrisc/
127 New config option to allow l.xori with unsigned operand. jeremybennett 5503d 11h /openrisc/
126 More explanation of l.xori. jeremybennett 5503d 12h /openrisc/
125 Update to specification of l.xori. jeremybennett 5503d 18h /openrisc/
124 Overflow handling now in line with architecture manual. Tests added. jeremybennett 5504d 07h /openrisc/
123 Implementation of l.mfspr and l.mtspr corrected to use bitwise OR rather than addition. Associated tests added. jeremybennett 5504d 11h /openrisc/

powered by: WebSVN 2.1.0

© copyright 1999-2025 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.