| Rev |
Log message |
Author |
Age |
Path |
| 419 |
ORPmon: Fixed interrupt routines in reset.S so they are compatible with new
GCC port (skip over redzone).
Added some defines to easily switch what is done when an error vector
is executed.
Added ability to print out EPCR when crashing.
Changed linker script back to one which doesn't skip over holes in SPI
flash memories. |
julius |
5271d 19h |
/openrisc/ |
| 418 |
Or1ksim - adding new option when configuring memories, "exitnops" |
julius |
5271d 19h |
/openrisc/ |
| 417 |
ORPSoC re-adding doc automake files, this time not symlinks |
julius |
5274d 16h |
/openrisc/ |
| 416 |
ORPSoC doc cleanup - removing symlinks from automake'd docs build path |
julius |
5274d 16h |
/openrisc/ |
| 415 |
ORPSoC - ML501 update, working again.
Documentation update including information on ML501 build
OR1200 updates to do with instruction cache tag signal when
invalidate instruction used.
Added ability to define address to pass to SPI flash when
booting.
Added SPI sw test for board which allows inspection of
data in a flash. |
julius |
5274d 16h |
/openrisc/ |
| 414 |
Updates to add -mredzone and improved GCC optimizations. |
jeremybennett |
5275d 11h |
/openrisc/ |
| 413 |
Fixed to combined bug in the assembler and linker. |
jeremybennett |
5276d 14h |
/openrisc/ |
| 412 |
ORPSoC update - Rearranged Xilinx ML501, simulations working again. |
julius |
5278d 06h |
/openrisc/ |
| 411 |
Improved ethmac testbench and software.
Renamed some OR1200 library functions to be more generic.
Fixed bug with versatile_mem_ctrl for Actel board.
Added ability to simulate gatelevel modules alongside RTL modules
in board build. |
julius |
5278d 18h |
/openrisc/ |
| 410 |
ORPSoC: Adding README in root explaining how to build documentation, and
documentation fixup so it builds properly again. |
julius |
5279d 17h |
/openrisc/ |
| 409 |
ORPSoC: Renamed eth core to ethmac (correct name), added drivers for it.
Updated ethernet MAC's instantiation in ORDB1A3PE1500 board build.
Updated documentation. |
julius |
5279d 18h |
/openrisc/ |
| 408 |
ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too. |
julius |
5280d 06h |
/openrisc/ |
| 407 |
Update or1ksim version in toolchain script to rc2 |
julius |
5280d 09h |
/openrisc/ |
| 406 |
ORPmon indented files, bus, align and instruction errors vectors printf and reboot |
julius |
5280d 09h |
/openrisc/ |
| 405 |
ORPmon updates - ethernet driver updates |
julius |
5280d 14h |
/openrisc/ |
| 404 |
New scripts to build separate bare metal and Linux tool chains. Fixes to GDB so it builds with the Linux tool chain and uses RELA. Other minor fixes to the GCC tool chain. |
jeremybennett |
5280d 14h |
/openrisc/ |
| 403 |
ORPSoC big upgrade - intermediate check in. Lots still missing. To come very shortly. |
julius |
5281d 12h |
/openrisc/ |
| 402 |
Further updates to the compiler |
jeremybennett |
5281d 16h |
/openrisc/ |
| 401 |
Fixing find first one (ff1) and find last one (fl1) support in OR1200.
Updated documentation, adding missing l.ff1 and l.fl1 opcodes to supported
instructions table. |
julius |
5281d 17h |
/openrisc/ |
| 400 |
Updates to the linker, GCC, newlib and GDB in preparation for supporting C++. The key changes are that the linker now uses RELA and that GCC may save registers at the bottom of the stack before the frame is allocated or after it is deallocated, so exception handlers/thread primitives should not use the first 130 bytes after the SP. |
jeremybennett |
5281d 17h |
/openrisc/ |
