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Rev Log message Author Age Path
483 Updated with new opcodes to generate random numbers and to identify us as Or1ksim. jeremybennett 5588d 01h /openrisc/
482 Don't hardcode tool versions in help text olof 5589d 13h /openrisc/
481 OR1200 Update. RTL and spec. julius 5601d 08h /openrisc/
480 ORPSoC updates - ml501 project cleanups, DDR2 cache bug fixes. julius 5602d 05h /openrisc/
479 ORPSoC update to ml501 board port. Memory controller caching fixed up, does multiple lines of cache and Wishbone bursting. julius 5603d 05h /openrisc/
478 ORPSoC update - ml501 or1200 cache configuration set to maximum, some cleanups. julius 5604d 21h /openrisc/
477 ORPSoC update - Added ability to enable OR1200 caches up to 32KB, which requires line size of 32bytes and 8-beat Wishbone bursts.
Changed cache sizes of both instruction and data cache of reference design to 4kB each.		 julius 5605d 05h /openrisc/
476 ORPSoC updates. Added 16kB cache options to OR1200, now as default on reference design. Cleaned up simulation Makefile more. julius 5605d 22h /openrisc/
475 ORPSoC main simulation makefile tidy up, addition of BSS test to cbasic test, addition or o1ksim config files for each board build, modification of BSS symbols in linker script and crt0. julius 5606d 00h /openrisc/
474 uC/OS-II port linker flags updated. julius 5606d 06h /openrisc/
473 Fix typos in tool chain build script. Add build script for BusyBox/uClibc/Linux. Delete obsolete scripts, improve board description for test, add -pthread flag to GCC for Linux. jeremybennett 5607d 01h /openrisc/
472 Various changes which improve the quality of the tracing. jeremybennett 5607d 02h /openrisc/
471 Adding ucos-ii port. julius 5609d 05h /openrisc/
470 ORPSoC OR1200 crt0 updates. julius 5610d 00h /openrisc/
469 newlib update - added zeroing of r0 to crt0.S julius 5611d 01h /openrisc/
468 ORPSoC update:
Added USER_ELF and USER_VMEM options to reference design simulation scripts.
Changed use of absolute BOARD_PATH variable to simply BOARD relative to board path
ML501's board.h bootrom default now boot from SPI		 julius 5611d 02h /openrisc/
467 ORPmon - bug fixes and clean up. julius 5611d 23h /openrisc/
466 ORPSoC updates:
Add new test to determine processor's capabilities.
Fix up typo in example in spiflash app README		 julius 5612d 05h /openrisc/
465 ORPSoC SPI flash load Makefile and README updates. julius 5612d 19h /openrisc/
464 More ORPmon updates. julius 5612d 20h /openrisc/

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