Rev |
Log message |
Author |
Age |
Path |
498 |
or_debug_proxy updates to documentation and Makefile related to latest ftd2xx driver, |
julius |
5156d 16h |
/openrisc/ |
497 |
or_debug_proxy updates |
julius |
5157d 12h |
/openrisc/ |
496 |
ORPSoC ml501 updates - increased frequency, updated documentation |
julius |
5157d 14h |
/openrisc/ |
495 |
ORPSoC adding more accessor functions to Micron SDRAM model. |
julius |
5157d 14h |
/openrisc/ |
494 |
Change to ensure handles ctrl-C correctly with empty line. |
jeremybennett |
5168d 07h |
/openrisc/ |
493 |
ORPSoC VPI JTAG interface, hopefully fix 64-bit machine compile issues. |
julius |
5170d 16h |
/openrisc/ |
492 |
ORPSoC VPI interface for modelsim and documentation update |
julius |
5171d 14h |
/openrisc/ |
491 |
ORPSoC or1200_monitor update. |
julius |
5172d 00h |
/openrisc/ |
490 |
Updates to fix spurious test failures and register scheduling. |
jeremybennett |
5176d 06h |
/openrisc/ |
489 |
ORPSoC sw cleanup. Remove warnings. |
julius |
5181d 13h |
/openrisc/ |
488 |
ORPSoC OR1200 driver - tick timer exception handler reverted to generic - cpu tick function hook used as default in handler table. OR1200 timer demo sw for board added. |
julius |
5181d 13h |
/openrisc/ |
487 |
ORPSoC main software makefile update |
julius |
5184d 11h |
/openrisc/ |
486 |
ORPSoC updates, mainly software, i2c driver |
julius |
5184d 11h |
/openrisc/ |
485 |
ORPSoC updates - or1200 monitor now has separate defines file, ethmac updates to fifos and wishbone IF, board.h changes for UART (may propegate to other drivers with multiple cores, we'll see), crt0.S for or1200 now zeros all registers on reset, adding own ethernet tests for ML501 |
julius |
5188d 16h |
/openrisc/ |
484 |
Changes to make r12 call-saved and to bring wchar tests in line. |
jeremybennett |
5189d 14h |
/openrisc/ |
483 |
Updated with new opcodes to generate random numbers and to identify us as Or1ksim. |
jeremybennett |
5191d 16h |
/openrisc/ |
482 |
Don't hardcode tool versions in help text |
olof |
5193d 04h |
/openrisc/ |
481 |
OR1200 Update. RTL and spec. |
julius |
5204d 23h |
/openrisc/ |
480 |
ORPSoC updates - ml501 project cleanups, DDR2 cache bug fixes. |
julius |
5205d 20h |
/openrisc/ |
479 |
ORPSoC update to ml501 board port. Memory controller caching fixed up, does multiple lines of cache and Wishbone bursting. |
julius |
5206d 20h |
/openrisc/ |
478 |
ORPSoC update - ml501 or1200 cache configuration set to maximum, some cleanups. |
julius |
5208d 11h |
/openrisc/ |
477 |
ORPSoC update - Added ability to enable OR1200 caches up to 32KB, which requires line size of 32bytes and 8-beat Wishbone bursts.
Changed cache sizes of both instruction and data cache of reference design to 4kB each. |
julius |
5208d 20h |
/openrisc/ |
476 |
ORPSoC updates. Added 16kB cache options to OR1200, now as default on reference design. Cleaned up simulation Makefile more. |
julius |
5209d 13h |
/openrisc/ |
475 |
ORPSoC main simulation makefile tidy up, addition of BSS test to cbasic test, addition or o1ksim config files for each board build, modification of BSS symbols in linker script and crt0. |
julius |
5209d 15h |
/openrisc/ |
474 |
uC/OS-II port linker flags updated. |
julius |
5209d 21h |
/openrisc/ |
473 |
Fix typos in tool chain build script. Add build script for BusyBox/uClibc/Linux. Delete obsolete scripts, improve board description for test, add -pthread flag to GCC for Linux. |
jeremybennett |
5210d 16h |
/openrisc/ |
472 |
Various changes which improve the quality of the tracing. |
jeremybennett |
5210d 17h |
/openrisc/ |
471 |
Adding ucos-ii port. |
julius |
5212d 20h |
/openrisc/ |
470 |
ORPSoC OR1200 crt0 updates. |
julius |
5213d 15h |
/openrisc/ |
469 |
newlib update - added zeroing of r0 to crt0.S |
julius |
5214d 16h |
/openrisc/ |