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Rev Log message Author Age Path
675 FreeRTOSV6.1.1
Source cleanup
Add redzone beyond the stack pointer		 filepang 4840d 02h /openrisc/
674 or1200: Fix for Bug 76 - Incorrect unsigned integer less-than compare with COMP3 option enabled julius 4843d 16h /openrisc/
673 Multiple 64-bit fixes (mostly sign and size of constants). Fix bug #1. yannv 4876d 11h /openrisc/
672 ORPSoC: Fix Bug 76 - Incorrect unsigned integer less-than compare with COMP3 option enabled

OR1200 RTL fix and software test added.		 julius 4880d 03h /openrisc/
671 ORPSoC: Fix for Bug 75 - or1200-except and or1200-ticksyscall regression tests failing due to change in memory model julius 4880d 03h /openrisc/
670 Changing bugurl as we have bugzilla now olof 4880d 07h /openrisc/
669 FreeRTOSV6.1.1
source cleanup, delete uncecessary code		 filepang 4883d 11h /openrisc/
668 FreeRTOSV6.1.1
add missing 'make clean' in make script		 filepang 4884d 02h /openrisc/
667 Corrected ITLB/DTLB values according to the arch spec.
This partially fixes bug #58		 olof 4885d 07h /openrisc/
666 FreeRTOSV6.1.1
minimal set of standard demo task is working		 filepang 4886d 11h /openrisc/
665 FreeRTOSV6.1.1
fix context save/restore stack size bug
remove unnecessary line		 filepang 4886d 11h /openrisc/
664 FreeRTOSV6.1.1
modify processor abstraction layer.
now,all tasks are running in supervisor mode		 filepang 4886d 11h /openrisc/
663 Fix compatibility problems with GCC 4.6.1. Fix a bug with hardware floating point in GCC. jeremybennett 4890d 06h /openrisc/
662 minor corrections to clean simulation files paknick 4906d 08h /openrisc/
661 added makefile for icarus simulation paknick 4906d 08h /openrisc/
660 updated makefiles for simulation with altera ordb2a-ep4ce22 paknick 4906d 10h /openrisc/
659 Fixed longjmp hal implementation skrzyp 4908d 15h /openrisc/
658 example configuration uses RAM startup skrzyp 4926d 12h /openrisc/
657 test generation fixed skrzyp 4926d 14h /openrisc/
656 orpsoc: cfi_ctrl software driver fix to allow compilation when it's not used julius 4931d 05h /openrisc/

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