OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] - Rev 248

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
248 Fixed two bugs in GDB tests.

* gdb.base/break.exp: Test for breakpoint at marker4, output
should be identical whether run with or without prototypes.
* gdb.base/call-sc.exp (test_scalar_returns): When the result of a
return is unknown, the value returned is undefined, not unchanged.
jeremybennett 5321d 07h /openrisc/trunk/
247 Set DWARF2 as the default debugging format. Clear out redundant code from
header.

* config/or32/elf.h <DWARF2_DEBUGGING_INFO>: Defined.
<PREFERRED_DEBUGGING_TYPE>: Changed to DWARF2_DEBUG.
<PUT_SDB_DEF>: Deleted.
* config/or32/or32.h: Obsolete code surrounded by "#if 0" removed
for clarity.
<SDB_DELIM>: Definition deleted.
<DBX_CONTIN_LENGTH, DBX_CONTIN_CHAR, DBX_REGISTER_NUMBER>:
Definition deleted (default suffices).
<DWARF2_UNWIND_INFO, DWARF2_FRAME_INFO>: Defined.
<DWARF2_ASM_LINE_DEBUG_INFO, INCOMIN_RETURN_ADDR_RTX>: Defined.
* config/or32/or32.md: Commenting clarified. Obsolete code for
define_function_unit deleted.
jeremybennett 5321d 07h /openrisc/trunk/
246 ORPmon update - compatiable with new GCC, added new spr-defs file, better tboot reliability julius 5322d 21h /openrisc/trunk/
245 Fixed minor glitch in build script. Corrected newlib options and added GDB options for simulator script. Updated README to refer to IRC channel. jeremybennett 5326d 04h /openrisc/trunk/
244 Don't try to skip prologue using SAL info (fails with STABS). Fuller check of prologue. Change register names to rnn from gprnn to match assembler. Add debug option to simulator wrapper.

* or32-tdep.c (or32_register_name): Changed to rnn rather than
gprnn to mach the assembler.
(or32_is_arg_reg, or32_is_callee_saved_reg): Added.
(or32_skip_prologue): Don't use skip_prologue_using_sal. Check for
argument as well as callee saved registers in prologue.
(or32_frame_cache):Check for argument as well as callee saved
registers in prologue.

* wrapper.c: OR32_SIM_DEBUG added to control debug messages.
(sim_close, sim_load, sim_create_inferior, sim_fetch_register)
(sim_stop): Debug statement added.
(sim_read, sim_write): Debug statements now controlled by
OR32_SIM_DEBUG.
(sim_store_register, sim_resume): Debug statement added and
existing debug statements now controlled by OR32_SIM_DEBUG.
jeremybennett 5326d 05h /openrisc/trunk/
243 Fixed libgloss for compiled code with leading underscores removed.

* libgloss/or32/crt0.S (_start): Remove all leading underscores from
references to global C functions and variables (printf, stack,
atexit, _uart_init, main). Modified end of memory detection, so it
works on rentry as well as initial entry. <buserr>: New code to
allow re-entrant _start function.
jeremybennett 5326d 05h /openrisc/trunk/
242 Generate global symbols without leading underscore. Tidy up generation of .proc directive.

* config/or32/elf.h <PUT_SDB_DEF>: Definition removed.
<USER_LABEL_PREFIX>: Modified to match or32.h
* config/or32/linux-elf.h<USER_LABEL_PREFIX>: Modified to match
or32.h
* config/or32/or32.h <LIB_SPEC>: Changed to use free instead of
_free to match change in USER_LABEL_PREFIX.
<USER_LABEL_PREFIX>: Changed from "_" to "".
<ASM_OUTPUT_FUNCTION_PREFIX>: Surround .proc by tab chars.
* config/or32/or32.S (__mulsi3, __udivsi3, __divsi3, __umodsi3)
(__modsi3): Changed from ___mulsi3, ___udivsi3, ___divsi3,
___umodsi3 and ___modsi3 respectively to match change in
USER_LABEL_PREFIX.
jeremybennett 5326d 05h /openrisc/trunk/
241 Ensure register and symbol operands are never confused.

* gas/config/tc-or32.c (parse_operand): New argument to specify that
operand is a register.
(machine_ip): All uses of parse_operand updated to use new argument.
jeremybennett 5326d 05h /openrisc/trunk/
240 or1ksim build fixups for Cygwin copilation julius 5338d 06h /openrisc/trunk/
239 or1ksim fixed SPR_VR_RESV value julius 5340d 02h /openrisc/trunk/
238 Added OS X build notes to gnu-src README julius 5341d 01h /openrisc/trunk/
237 Fixes bug in handling single stepping. jeremybennett 5341d 22h /openrisc/trunk/
236 Terminate execution on NOP_EXIT, even if debugging, add support for RSP qAttached packet, stall in library after single instruction is ST bit is set in SPR DMR1. Fix softfloat to allow compilation with -O0 for debugging.

* configure: Regenerated.
* configure.ac: Version changed to current date. Test for
varargs.h dropped.
* cpu/or32/insnset.c <l_nop>: Terminate execution on NOP_EXIT,
even if debugging.
* debug/rsp-server.c (rsp_query): Added support for qAttached
packet.
* libtoplevel.c (or1ksim_run): Stall after a single instruction if
SPR_DMR1_ST flag is set.
* softfloat/host.h: Make #define of INLINE conditional, to allow
the user to override.
* softfloat/README: Added instructions for non-optimized compilation.
* softfloat/softfloat-macros: Add a conditional #ifndef
NO_SOFTFLOAT_UNUSUED around unused functions.
jeremybennett 5341d 23h /openrisc/trunk/
235 Removed support for old OpenRISC JTAG Remote Protocol. jeremybennett 5342d 03h /openrisc/trunk/
234 Minor tidy ups. DOS end of line chars fixed. jeremybennett 5343d 05h /openrisc/trunk/
233 New softfloat FPU and testfloat sw for or1ksim julius 5343d 16h /openrisc/trunk/
232 Brought documentation up to date. jeremybennett 5344d 02h /openrisc/trunk/
231 Japanes translation of the OpenRISC specification by Takashi Okawa. jeremybennett 5344d 07h /openrisc/trunk/
230 Changed library interface. Fixed namespace problems with instruction lookup in library.

* configure: Regenerated.
* configure.ac: Version changed to current date.
* cpu/or1k/opcode/or32.h <or1ksim_build_automata>: Renamed from
build_automata.
<l_none, num_opcodes, insn_index>: Deleted.
<or1ksim_op_start>: Renamed from op_start.
<or1ksim_automata>: Renamed from automata.
<or1ksim_ti>: Renamed from ti.
<or1ksim_or32_opcodes>: Renamed from or32_opcodes.
<or1ksim_disassembled>: Renamed from disassembled.
<or1ksim_insn_len>: Renamed from insn_len.
<or1ksim_insn_name>: Renamed from insn_name.
<or1ksim_destruct_automata>: Renamed from destruct_automata.
<or1ksim_insn_decode>: Renamed from insn_decode.
<or1ksim_disassemble_insn>: Renamed from disassemble_insn.
<or1ksim_disassemble_index>: Renamed from disassemble_index.
<or1ksim_extend_imm>: Renamed from extend_imm.
<or1ksim_or32_extract>: Renamed from or32_extract
* cpu/or32/or32.c, cpu/or32/execute.c, cpu/or32/generate.c,
* cpu/common/stats.c, cpu/common/abstract.c, cpu/common/parse.c,
* cpu/or1k/opcode/or32.h, cuc/load.c, cuc/cuc.c,
* support/dumpverilog.c, toplevel-support.c: Renaming
corresponding to changes in cpu/or1k/opcode/or32.h.
* cpu/or32/execute-fp.h: Deleted
* cpu/or32/generate.c <include_strings>: Remove reference to
execute-fp.h
* cpu/or32/execute.c <host_fp_rm>: Declared static.
(fp_set_flags_restore_host_rm, fp_set_or1k_rm): Declared static,
forward declaration removed.
* or1ksim.h (or1ksim_read_mem, or1ksim_write_mem): addr arg
changed to unsigned long int.
(or1ksim_read_spr): sprval_ptr arg changed to unsigned long int *.
(or1ksim_write_spr): sprval arg changed to unsigned long int.
(or1ksim_read_reg): regval_ptr arg changed to unsigned long int *.
(or1ksim_write_reg): regval arg changed to unsigned long int.
* libtoplevel.c (or1ksim_read_mem, or1ksim_write_mem): addr arg
changed to unsigned long int.
(or1ksim_read_spr): sprval_ptr arg changed to unsigned long int *.
(or1ksim_write_spr): sprval arg changed to unsigned long int.
(or1ksim_read_reg): regval_ptr arg changed to unsigned long int *.
(or1ksim_write_reg): regval arg changed to unsigned long int.
jeremybennett 5344d 20h /openrisc/trunk/
229 Changes to allow GDB 7.1 tests to run and to remove a couple of $Id$ that were confusing SVN. jeremybennett 5345d 01h /openrisc/trunk/
228 Updated for separate compilation etc of GDB 7.1 jeremybennett 5345d 07h /openrisc/trunk/
227 GDB 7.1 for OpenRISC 1000. Initial checkin. jeremybennett 5345d 19h /openrisc/trunk/
226 Orksim floating point support additions, spr-defs.h updates, newlib cache init routines updated julius 5346d 21h /openrisc/trunk/
225 Fix GDB to work with Or1ksim, so target sim works. Sync GDB with binutils 2.20.1. jeremybennett 5347d 04h /openrisc/trunk/
224 Add new library functions and modify existing ones. Change the parameter type enumarations to upper case. New (simplified and corrected) config file parsing. No include files or default sim.cfg. jeremybennett 5347d 04h /openrisc/trunk/
220 Updated library interface to take a full command line (this will break all old code). Added -q/--quiet and --report-memory-errors flags to command line. Fixed all tests to match this. jeremybennett 5353d 20h /openrisc/trunk/
219 Fixes to OR32 testing of gas jeremybennett 5353d 23h /openrisc/trunk/
218 Update to allow automatic checking of all the tools and libraries. jeremybennett 5354d 23h /openrisc/trunk/
217 Minor tidy up. jeremybennett 5355d 00h /openrisc/trunk/
216 Remove unneeded printf from wrapper.c Update ChangeLogs for recent changes. jeremybennett 5356d 05h /openrisc/trunk/

powered by: WebSVN 2.1.0

© copyright 1999-2025 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.