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Rev Log message Author Age Path
414 Updates to add -mredzone and improved GCC optimizations. jeremybennett 5311d 04h /openrisc/trunk
413 Fixed to combined bug in the assembler and linker. jeremybennett 5312d 07h /openrisc/trunk
412 ORPSoC update - Rearranged Xilinx ML501, simulations working again. julius 5313d 23h /openrisc/trunk
411 Improved ethmac testbench and software.

Renamed some OR1200 library functions to be more generic.

Fixed bug with versatile_mem_ctrl for Actel board.

Added ability to simulate gatelevel modules alongside RTL modules
in board build.
julius 5314d 11h /openrisc/trunk
410 ORPSoC: Adding README in root explaining how to build documentation, and
documentation fixup so it builds properly again.
julius 5315d 10h /openrisc/trunk
409 ORPSoC: Renamed eth core to ethmac (correct name), added drivers for it.
Updated ethernet MAC's instantiation in ORDB1A3PE1500 board build.
Updated documentation.
julius 5315d 11h /openrisc/trunk
408 ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too. julius 5315d 23h /openrisc/trunk
407 Update or1ksim version in toolchain script to rc2 julius 5316d 02h /openrisc/trunk
406 ORPmon indented files, bus, align and instruction errors vectors printf and reboot julius 5316d 02h /openrisc/trunk
405 ORPmon updates - ethernet driver updates julius 5316d 07h /openrisc/trunk
404 New scripts to build separate bare metal and Linux tool chains. Fixes to GDB so it builds with the Linux tool chain and uses RELA. Other minor fixes to the GCC tool chain. jeremybennett 5316d 07h /openrisc/trunk
403 ORPSoC big upgrade - intermediate check in. Lots still missing. To come very shortly. julius 5317d 04h /openrisc/trunk
402 Further updates to the compiler jeremybennett 5317d 09h /openrisc/trunk
401 Fixing find first one (ff1) and find last one (fl1) support in OR1200.

Updated documentation, adding missing l.ff1 and l.fl1 opcodes to supported
instructions table.
julius 5317d 10h /openrisc/trunk
400 Updates to the linker, GCC, newlib and GDB in preparation for supporting C++. The key changes are that the linker now uses RELA and that GCC may save registers at the bottom of the stack before the frame is allocated or after it is deallocated, so exception handlers/thread primitives should not use the first 130 bytes after the SP. jeremybennett 5317d 10h /openrisc/trunk
399 Updates to the linker, GCC, newlib and GDB in preparation for supporting C++. The key changes are that the linker now uses RELA and that GCC may save registers at the bottom of the stack before the frame is allocated or after it is deallocated, so exception handlers/thread primitives should not use the first 130 bytes after the SP. jeremybennett 5317d 12h /openrisc/trunk
398 ORPSoCv2 removing generic backend path - not needed julius 5318d 11h /openrisc/trunk
397 ORPSoCv2:

doc/ path added, with Texinfo documentation. Still a work in progress.

VPI files updated.

OR1200 l.maci instruction test added. highlighting bug with immediate field for that instruction.

Various cycle accurate model updates. Now uses orpsoc-defines.v (processed C-compat. version) to build.
julius 5319d 10h /openrisc/trunk
396 ORPSoCv2 final software fixes...for now. See updated README julius 5322d 09h /openrisc/trunk
395 ORPSoCv2 moving ethernet tests to correct place julius 5322d 09h /openrisc/trunk
394 ORPSoCv2 removing unused directories julius 5322d 09h /openrisc/trunk
393 ORPSoCv2 software rearrangement in progress. Basic tests should now run again. julius 5322d 09h /openrisc/trunk
392 ORPSoCv2 software path reorganisation stage 1. julius 5323d 01h /openrisc/trunk
391 Removing modules no longer needed in ORPSoCv2 julius 5324d 02h /openrisc/trunk
390 Updated toolchain build scripts to use FTP server on OpenCores.org. julius 5324d 02h /openrisc/trunk
389 SD-Card boot added (sdboot) to the commands in the load file. DOS-filesystem added to support Fat12-16. Driver for SD-card added, SD and SDHC supported
Currently hardcoded to boot from vmlinux.bin
tac2 5334d 10h /openrisc/trunk
387 Fixed testing, to always use our DEJAGNU config. jeremybennett 5347d 09h /openrisc/trunk
386 Updated for release 0.5.0rc2 jeremybennett 5347d 10h /openrisc/trunk
385 Updates for Or1ksim 0.5.0rc2.

* configure: Regenerated.
* configure.ac: Minor tidy ups. Version changed to 0.5.0rc2.
* debug/rsp-server.c (rsp_query): Simplified handling of
"qTStatus" to indicate we just do not support tracing.
* doc/or1ksim.texi <Configuring the Build>: No longer mandatory to
specify the target.
<Memory Configuration>: Warns about issues with memory controller.
<Memory Controller Configuration>: Warns about issues with memory
controller and advises not to use it.
<Standalone Simulator>: Details for options with arguments updated.
* NEWS: Updated for 0.5.0rc2.
* peripheral/mc.c (mc_poc): Use constant MC_POC_VALID
(mc_index): Ensure value is valid.
* peripheral/mc-defines.h <MC_CE_VALID>: Defined.

* testsuite/test-code-or1k/configure: Regenerated.
* testsuite/test-code-or1k/configure.ac: Handle the case where
target_cpu is not set. Version changed to 0.5.0rc2.
* testsuite/test-code-or1k/support/spr-defs.h <SPR_VR_RES>:
Definition corrected.
jeremybennett 5347d 10h /openrisc/trunk
383 Adding makeinfo as a required tool to crossbuild-1.0.sh script julius 5348d 13h /openrisc/trunk

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