| Rev |
Log message |
Author |
Age |
Path |
| 495 |
ORPSoC adding more accessor functions to Micron SDRAM model. |
julius |
5156d 11h |
/openrisc/trunk/ |
| 494 |
Change to ensure handles ctrl-C correctly with empty line. |
jeremybennett |
5167d 05h |
/openrisc/trunk/ |
| 493 |
ORPSoC VPI JTAG interface, hopefully fix 64-bit machine compile issues. |
julius |
5169d 13h |
/openrisc/trunk/ |
| 492 |
ORPSoC VPI interface for modelsim and documentation update |
julius |
5170d 11h |
/openrisc/trunk/ |
| 491 |
ORPSoC or1200_monitor update. |
julius |
5170d 22h |
/openrisc/trunk/ |
| 490 |
Updates to fix spurious test failures and register scheduling. |
jeremybennett |
5175d 04h |
/openrisc/trunk/ |
| 489 |
ORPSoC sw cleanup. Remove warnings. |
julius |
5180d 10h |
/openrisc/trunk/ |
| 488 |
ORPSoC OR1200 driver - tick timer exception handler reverted to generic - cpu tick function hook used as default in handler table. OR1200 timer demo sw for board added. |
julius |
5180d 11h |
/openrisc/trunk/ |
| 487 |
ORPSoC main software makefile update |
julius |
5183d 09h |
/openrisc/trunk/ |
| 486 |
ORPSoC updates, mainly software, i2c driver |
julius |
5183d 09h |
/openrisc/trunk/ |
| 485 |
ORPSoC updates - or1200 monitor now has separate defines file, ethmac updates to fifos and wishbone IF, board.h changes for UART (may propegate to other drivers with multiple cores, we'll see), crt0.S for or1200 now zeros all registers on reset, adding own ethernet tests for ML501 |
julius |
5187d 13h |
/openrisc/trunk/ |
| 484 |
Changes to make r12 call-saved and to bring wchar tests in line. |
jeremybennett |
5188d 12h |
/openrisc/trunk/ |
| 483 |
Updated with new opcodes to generate random numbers and to identify us as Or1ksim. |
jeremybennett |
5190d 14h |
/openrisc/trunk/ |
| 482 |
Don't hardcode tool versions in help text |
olof |
5192d 02h |
/openrisc/trunk/ |
| 481 |
OR1200 Update. RTL and spec. |
julius |
5203d 20h |
/openrisc/trunk/ |
| 480 |
ORPSoC updates - ml501 project cleanups, DDR2 cache bug fixes. |
julius |
5204d 18h |
/openrisc/trunk/ |
| 479 |
ORPSoC update to ml501 board port. Memory controller caching fixed up, does multiple lines of cache and Wishbone bursting. |
julius |
5205d 17h |
/openrisc/trunk/ |
| 478 |
ORPSoC update - ml501 or1200 cache configuration set to maximum, some cleanups. |
julius |
5207d 09h |
/openrisc/trunk/ |
| 477 |
ORPSoC update - Added ability to enable OR1200 caches up to 32KB, which requires line size of 32bytes and 8-beat Wishbone bursts.
Changed cache sizes of both instruction and data cache of reference design to 4kB each. |
julius |
5207d 17h |
/openrisc/trunk/ |
| 476 |
ORPSoC updates. Added 16kB cache options to OR1200, now as default on reference design. Cleaned up simulation Makefile more. |
julius |
5208d 10h |
/openrisc/trunk/ |
| 475 |
ORPSoC main simulation makefile tidy up, addition of BSS test to cbasic test, addition or o1ksim config files for each board build, modification of BSS symbols in linker script and crt0. |
julius |
5208d 13h |
/openrisc/trunk/ |
| 474 |
uC/OS-II port linker flags updated. |
julius |
5208d 19h |
/openrisc/trunk/ |
| 473 |
Fix typos in tool chain build script. Add build script for BusyBox/uClibc/Linux. Delete obsolete scripts, improve board description for test, add -pthread flag to GCC for Linux. |
jeremybennett |
5209d 13h |
/openrisc/trunk/ |
| 472 |
Various changes which improve the quality of the tracing. |
jeremybennett |
5209d 15h |
/openrisc/trunk/ |
| 471 |
Adding ucos-ii port. |
julius |
5211d 18h |
/openrisc/trunk/ |
| 470 |
ORPSoC OR1200 crt0 updates. |
julius |
5212d 13h |
/openrisc/trunk/ |
| 469 |
newlib update - added zeroing of r0 to crt0.S |
julius |
5213d 14h |
/openrisc/trunk/ |
| 468 |
ORPSoC update:
Added USER_ELF and USER_VMEM options to reference design simulation scripts.
Changed use of absolute BOARD_PATH variable to simply BOARD relative to board path
ML501's board.h bootrom default now boot from SPI |
julius |
5213d 14h |
/openrisc/trunk/ |
| 467 |
ORPmon - bug fixes and clean up. |
julius |
5214d 11h |
/openrisc/trunk/ |
| 466 |
ORPSoC updates:
Add new test to determine processor's capabilities.
Fix up typo in example in spiflash app README |
julius |
5214d 17h |
/openrisc/trunk/ |
