URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [cpu/] [common/] - Rev 100

Rev	Log message	Author	Age	Path
100	Single precision FPU stuff for or1ksim	julius	5649d 00h	/openrisc/trunk/or1ksim/cpu/common/
98	Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller.	jeremybennett	5654d 23h	/openrisc/trunk/or1ksim/cpu/common/
97	Updates to test the new JTAG library interface (not yet complete).	jeremybennett	5669d 05h	/openrisc/trunk/or1ksim/cpu/common/
96	Various changes which had not been picked up in earlier commits.	jeremybennett	5670d 07h	/openrisc/trunk/or1ksim/cpu/common/
91	Tidy up of some obsolete configuration code.	jeremybennett	5682d 20h	/openrisc/trunk/or1ksim/cpu/common/
90	Reorganized to allow tests with both native code (for the library) and OpenRISC code (which requires the target tool chain).	jeremybennett	5682d 21h	/openrisc/trunk/or1ksim/cpu/common/
82	Major restructuring of the testbench, now named testsuite to bring it into the main package with its own configuration. Uses DejaGNU and builds using a standard top level "make check". Incorporate Mark Jarvis's fixes for Mac OS X.	jeremybennett	5683d 20h	/openrisc/trunk/or1ksim/cpu/common/
80	Add missing configuration files to SVN.	jeremybennett	5684d 00h	/openrisc/trunk/or1ksim/cpu/common/
19	Initial commit of Or1ksim 0.3.0 into the new repository	jeremybennett	6014d 05h	/openrisc/trunk/or1ksim/cpu/common/