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854 Add OR1200_OR32_LWS define to board specific or1200_defines.v stekern 4384d 12h /openrisc/trunk/orpsocv2/boards/
677 atlys: add 2-clock synchronizer chain for ddr2_calib_done

The signal ddr2_calib_done signal comes from the ddr2 clock domain,
while wb_req is treating it as if it came from wb_clk domain. As a
result the timing analysis tool assumed a worst case scenario of 5ns
between the two domains and the results were miserable.

While we can argue that this is a multi-cycle path, the fact is that
ddr2_calib_done feeds into multiple logic sinks and can potentially
cause meta-stability issue in the design. The solution is to add a
2-clock meta-stability filter to address both the timing problems and
the meta-stability concern.

Signed-off-by: Jason Zheng <jxzheng@gmail.com>
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Acked-by: Olof Kindgren <olof.kindgren@orsoc.se>
stekern 4671d 01h /openrisc/trunk/orpsocv2/boards/
655 ORPSoC: add CFI flash controller to ml501, sw driver, tests, app, documentation julius 4792d 20h /openrisc/trunk/orpsocv2/boards/
652 Fix make compile.tcl for actel backend yannv 4801d 03h /openrisc/trunk/orpsocv2/boards/
638 orpsoc: xilinx: use XILINX env variable

instead of rely on custom environment variables,
use the XILINX variable and instruct the user how to
source the scripts that set it.

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
stekern 4847d 13h /openrisc/trunk/orpsocv2/boards/
634 orpsoc: atlys: autoregenerate coregen cores

Instead of keeping binary .ngc files of the coregen
generated cores, use coregen to generate them from the .xco
and .cgp file
stekern 4852d 13h /openrisc/trunk/orpsocv2/boards/
633 orpsoc: add Digilent Atlys spartan6 board README

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
stekern 4852d 13h /openrisc/trunk/orpsocv2/boards/
632 orpsoc: add Digilent Atlys spartan6 board sw include file

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
stekern 4852d 13h /openrisc/trunk/orpsocv2/boards/
631 orpsoc: add Digilent Atlys spartan6 board testbench

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
stekern 4852d 13h /openrisc/trunk/orpsocv2/boards/
630 orpsoc: add Digilent Atlys spartan6 board backend

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
stekern 4852d 13h /openrisc/trunk/orpsocv2/boards/
629 orpsoc: add Digilent Atlys spartan6 board or1ksim configuration

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
stekern 4852d 13h /openrisc/trunk/orpsocv2/boards/
628 orpsoc: add Digilent Atlys spartan6 board Makefiles

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
stekern 4852d 13h /openrisc/trunk/orpsocv2/boards/
627 orpsoc: add Digilent Atlys spartan6 board rtl

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
stekern 4852d 13h /openrisc/trunk/orpsocv2/boards/
568 OPRSoC - adding Xilinx Xtreme DSP Spartan-3A 1800A board port and documentation julius 4905d 06h /openrisc/trunk/orpsocv2/boards/
563 Search for external cores in <board>/modules path olof 4917d 19h /openrisc/trunk/orpsocv2/boards/
560 ORPSoC update - update make scripts, XILINX_PATH setup changes.

Note - may require a change to XILINX_PATH on user systems.
julius 4925d 18h /openrisc/trunk/orpsocv2/boards/
544 ORPSoC ordb1a3pe1500 update - adding SD card controller. julius 4943d 07h /openrisc/trunk/orpsocv2/boards/
542 ORPSoC scripts cleanup. Now centralised.

Documentation updated for ml501's SPI programming, noting issues with ISE12.
julius 4948d 21h /openrisc/trunk/orpsocv2/boards/
530 ORPSoC update

Ethernet MAC Wishbone interface fixes

Beginnings of software update.

ML501 backend script fixes for new ISE
julius 4972d 07h /openrisc/trunk/orpsocv2/boards/
503 ORPSoC's or1200 defines fix to indicate we don't actually have I/DMMU invalidate registers. julius 5015d 18h /openrisc/trunk/orpsocv2/boards/

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