OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_14/] - Rev 1765

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5497d 03h /or1k/tags/rel_14/
1190 This commit was manufactured by cvs2svn to create tag 'rel_14'. 7519d 17h /tags/rel_14/
1188 Added support for rams with byte write access. simons 7519d 17h /trunk/
1186 Added support for rams with byte write access. simons 7520d 16h /trunk/
1184 Scan signals mess fixed. simons 7527d 09h /trunk/
1183 OpenRISC port of gdb-5.3 straightforwardly derived from gdb-5.0 sfurman 7532d 01h /trunk/
1181 Initial import of unmodified gdb-5.3 source on vendor branch sfurman 7532d 03h /trunk/
1179 BIST interface added for Artisan memory instances. simons 7535d 13h /trunk/
1178 avoid another immu exception that should not happen phoenix 7565d 00h /trunk/
1177 more informative output phoenix 7566d 07h /trunk/
1176 Added comments. damonb 7566d 22h /trunk/
1174 fix for immu exceptions that never should have happened phoenix 7568d 02h /trunk/
1170 Added support for l.addc instruction. csanchez 7576d 06h /trunk/
1169 Added support for l.addc instruction. csanchez 7576d 06h /trunk/
1168 Added explicit alignment expressions. csanchez 7581d 16h /trunk/
1167 Corrected offset of TSS field within task_struct. csanchez 7581d 16h /trunk/
1166 Fixed problem with relocations of non-allocated sections. csanchez 7581d 17h /trunk/
1165 timeout bug fixed; contribution by Carlos markom 7598d 10h /trunk/
1161 When OR1200_NO_IMMU and OR1200_NO_IC are not both defined or undefined at the same time, results in a IC bug. Fixed. lampret 7601d 23h /trunk/
1160 added missing .rodata.* section into rom linker script phoenix 7632d 23h /trunk/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.