OpenCores
URL https://opencores.org/ocsvn/qspiflash/qspiflash/trunk

Subversion Repositories qspiflash

[/] [qspiflash/] [trunk/] - Rev 24

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
24 Fixed the v__DOT__* bug dgisselq 528d 05h /qspiflash/trunk/
23 Updated headers dgisselq 528d 05h /qspiflash/trunk/
22 Read only is now an option of wbqspiflash

It was a macro before.
dgisselq 528d 05h /qspiflash/trunk/
21 Added a formal proof of the lower level QSPI driver dgisselq 1001d 18h /qspiflash/trunk/
20 Changed reference to flash_config to flashconfig.v dgisselq 1001d 18h /qspiflash/trunk/
19 LLQSPI now passes formal tests dgisselq 1001d 18h /qspiflash/trunk/
18 Renamed the flash config file dgisselq 1001d 18h /qspiflash/trunk/
17 Added an option to turn off verbose outputs per tick dgisselq 1001d 18h /qspiflash/trunk/
16 Added a full blown test bench to the controller

This includes:
- A global make file, and a "make test" which will build the test bench.
- Merging other versions of the QSPI flash driver I had lying around
- Grabbing the best of these, and verifying that they work
- The result is a reduction in overall logic
dgisselq 1143d 23h /qspiflash/trunk/
15 Made the flash simulator's size variable.

Also adjusted the C interface, providing some new functions, so that the flash
simulation can be loaded and queried easier.
dgisselq 1165d 05h /qspiflash/trunk/
14 Updates: little-big endian, various other fixes

1. Made the wbqspiflash.v and llqspi.v files compile with default_nettype none
2. Changed the internal flash representation to big endian. A little-big
endian conversion is now required when writing to the flash from a PC.
3. Simplified the address description via w_wb_addr and w_spif_addr, so that
the core is more flexible when changing sizes.
4. Removed the dependence upon the WB_CYC line ... as part of the WB
simplifications I've been doing.
5. Got XIP working for the EQSPI flash (I guess --- it's been a while since
I made those changes)
6. Adjusted (fixed) sim of read/writes to the volatile config register
(necessary for XIP)
dgisselq 1165d 06h /qspiflash/trunk/
13 Fixed VERILATOR_ROOT static dependency. dgisselq 1367d 19h /qspiflash/trunk/
12 Adding the sources for the extended Quad SPI flash test bench. dgisselq 1434d 21h /qspiflash/trunk/
11 This code has been proven, and is currently working within an Arty platform. dgisselq 1434d 21h /qspiflash/trunk/
10 Switched to Quad Output mode by default. dgisselq 1451d 18h /qspiflash/trunk/
9 Minor changes to the baseline, FIRST RELEASE OF THE EQSPIFLASH controller!! dgisselq 1451d 20h /qspiflash/trunk/
8 Minor documentation edits. dgisselq 1682d 17h /qspiflash/trunk/
7 Added the ability to make the Quad/SPI flash run in read-only mode, in an
effort to reduce it's resource/LUT usage enough to run on a Digilent Cmod-S6.
dgisselq 1703d 02h /qspiflash/trunk/
6 Minor documentation (formatting) changes. dgisselq 1871d 00h /qspiflash/trunk/
5 Minor changes to the documentation. dgisselq 1878d 04h /qspiflash/trunk/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2020 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.