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[/] [robust_axi_fabric/] - Rev 19

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Rev Log message Author Age Path
19 IC support same ID from different masters eyalhoc 5061d 12h /robust_axi_fabric/
18 RobustVerilog version 1.4 compatible eyalhoc 5062d 04h /robust_axi_fabric/
17 Support RobustVerilog project eyalhoc 5074d 14h /robust_axi_fabric/
16 GUI support eyalhoc 5081d 09h /robust_axi_fabric/
15 eyalhoc 5090d 09h /robust_axi_fabric/
14 fixed run scripts eyalhoc 5107d 10h /robust_axi_fabric/
13 support single slave eyalhoc 5107d 15h /robust_axi_fabric/
12 allow no user signals eyalhoc 5112d 17h /robust_axi_fabric/
11 use match signals eyalhoc 5112d 17h /robust_axi_fabric/
10 added dos batch file for windows eyalhoc 5125d 10h /robust_axi_fabric/
9 fixed bug in address decoder eyalhoc 5131d 11h /robust_axi_fabric/
8 fixed bug in address decoding
if decode error without decode error slave mux to last slave
eyalhoc 5132d 10h /robust_axi_fabric/
7 added header eyalhoc 5133d 16h /robust_axi_fabric/
6 updated remarks eyalhoc 5136d 12h /robust_axi_fabric/
5 fixed run script eyalhoc 5137d 09h /robust_axi_fabric/
4 only 1 fabric generated eyalhoc 5144d 03h /robust_axi_fabric/
3 default definition file changed to create only 1 fabric eyalhoc 5144d 04h /robust_axi_fabric/
2 initial upload of files eyalhoc 5144d 10h /robust_axi_fabric/
1 The project and the structure was created root 5144d 14h /robust_axi_fabric/

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