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Rev Log message Author Age Path
20 IC give WVALID before AWREADY eyalhoc 4560d 03h /robust_axi_fabric/
19 IC support same ID from different masters eyalhoc 4563d 10h /robust_axi_fabric/
18 RobustVerilog version 1.4 compatible eyalhoc 4564d 02h /robust_axi_fabric/
17 Support RobustVerilog project eyalhoc 4576d 11h /robust_axi_fabric/
16 GUI support eyalhoc 4583d 06h /robust_axi_fabric/
15 eyalhoc 4592d 06h /robust_axi_fabric/
14 fixed run scripts eyalhoc 4609d 07h /robust_axi_fabric/
13 support single slave eyalhoc 4609d 12h /robust_axi_fabric/
12 allow no user signals eyalhoc 4614d 15h /robust_axi_fabric/
11 use match signals eyalhoc 4614d 15h /robust_axi_fabric/
10 added dos batch file for windows eyalhoc 4627d 07h /robust_axi_fabric/
9 fixed bug in address decoder eyalhoc 4633d 08h /robust_axi_fabric/
8 fixed bug in address decoding
if decode error without decode error slave mux to last slave
eyalhoc 4634d 07h /robust_axi_fabric/
7 added header eyalhoc 4635d 14h /robust_axi_fabric/
6 updated remarks eyalhoc 4638d 10h /robust_axi_fabric/
5 fixed run script eyalhoc 4639d 06h /robust_axi_fabric/
4 only 1 fabric generated eyalhoc 4646d 01h /robust_axi_fabric/
3 default definition file changed to create only 1 fabric eyalhoc 4646d 01h /robust_axi_fabric/
2 initial upload of files eyalhoc 4646d 07h /robust_axi_fabric/
1 The project and the structure was created root 4646d 11h /robust_axi_fabric/

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