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[/] [robust_axi_fabric/] [trunk/] [src/] - Rev 19

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Rev Log message Author Age Path
19 IC support same ID from different masters eyalhoc 4693d 16h /robust_axi_fabric/trunk/src/
18 RobustVerilog version 1.4 compatible eyalhoc 4694d 09h /robust_axi_fabric/trunk/src/
17 Support RobustVerilog project eyalhoc 4706d 18h /robust_axi_fabric/trunk/src/
16 GUI support eyalhoc 4713d 13h /robust_axi_fabric/trunk/src/
15 eyalhoc 4722d 13h /robust_axi_fabric/trunk/src/
13 support single slave eyalhoc 4739d 19h /robust_axi_fabric/trunk/src/
12 allow no user signals eyalhoc 4744d 21h /robust_axi_fabric/trunk/src/
11 use match signals eyalhoc 4744d 21h /robust_axi_fabric/trunk/src/
9 fixed bug in address decoder eyalhoc 4763d 15h /robust_axi_fabric/trunk/src/
8 fixed bug in address decoding
if decode error without decode error slave mux to last slave
eyalhoc 4764d 14h /robust_axi_fabric/trunk/src/
7 added header eyalhoc 4765d 20h /robust_axi_fabric/trunk/src/
3 default definition file changed to create only 1 fabric eyalhoc 4776d 08h /robust_axi_fabric/trunk/src/
2 initial upload of files eyalhoc 4776d 14h /robust_axi_fabric/trunk/src/

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