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[/] [rtfsimpleuart/] [trunk/] [rtl/] [verilog/] [rtfSimpleUartTx.v] - Rev 12

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12 +BaudX8 mode
!start frame detector - checks 1->0 transition
!frame complectness - frame completes right after center of a frame bit, allows more difference of sender and reciever baud
AlexRayne 3978d 08h /rtfsimpleuart/trunk/rtl/verilog/rtfSimpleUartTx.v
4 initial archive robfinch 4774d 08h /rtfsimpleuart/trunk/rtl/verilog/rtfSimpleUartTx.v

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