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[/] [s1_core/] [trunk/] [hdl/] - Rev 91

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Rev Log message Author Age Path
91 Filelists updated according to preprocessed files from OpenSPARC T1 1.6 fafa1971 6021d 14h /s1_core/trunk/hdl
90 Added newer files from OpenSPARC T1 1.6 preprocessed with "update_sparccore -ee" fafa1971 6021d 14h /s1_core/trunk/hdl
89 Removed files originated from OpenSPARC T1 Design 1.5 preprocessed with "update_sparccore -me" fafa1971 6021d 14h /s1_core/trunk/hdl
82 DC synthesis script modified according to the fabolous manual (RTFM...). fafa1971 6182d 21h /s1_core/trunk/hdl
81 Sorry, I made a mistake in the waveform of the clock! fafa1971 6183d 01h /s1_core/trunk/hdl
79 Relaxed timing, added flatten and hyerarchical report_area. fafa1971 6185d 21h /s1_core/trunk/hdl
75 Changed preprocessing for DC synthesis fafa1971 6285d 22h /s1_core/trunk/hdl
74 Updated filelists. fafa1971 6285d 22h /s1_core/trunk/hdl
73 New version of scripts for DC and to compile boot code fafa1971 6285d 22h /s1_core/trunk/hdl
58 These were only symbolic links to remember where such these things were defined fafa1971 6348d 13h /s1_core/trunk/hdl
57 Latest version fafa1971 6348d 13h /s1_core/trunk/hdl
56 Updated from OpenSPARC T1 version 1.4 to version 1.5 fafa1971 6348d 13h /s1_core/trunk/hdl
55 Nobody remembers why these blackboxed files were required! fafa1971 6348d 13h /s1_core/trunk/hdl
54 Updated filelists fafa1971 6348d 13h /s1_core/trunk/hdl
53 Removed from CVS tree because header file preprocessing is done elsewhere fafa1971 6348d 14h /s1_core/trunk/hdl
52 Updated SPARC Core files from OpenSPARC T1 version 1.4 to version 1.5 fafa1971 6348d 14h /s1_core/trunk/hdl
51 User Chris "gaterocket" corrected a couple of errors for FPGA boards: blocking assignments and two uninitialized variables. fafa1971 6434d 14h /s1_core/trunk/hdl
48 Updated with new OpenSPARC 1.4 list fafa1971 6499d 12h /s1_core/trunk/hdl
46 Fresh version from OpenSPARC 1.4 and Icarus define preprocessing fafa1971 6499d 12h /s1_core/trunk/hdl
45 I'm going to remove original OpenSPARC 1.4 files so that I can insert again
the ones with Icarus Verilog preprocessor already applied by update_sparccore
(it seems that Xilinx's XST does NOT support defines at compile time)		 fafa1971 6499d 12h /s1_core/trunk/hdl
44 Embedded `defines into Verilog source since did not find command line option for XST fafa1971 6500d 11h /s1_core/trunk/hdl
39 Empty modules for cacheless Simply RISC S1 Core fafa1971 6500d 11h /s1_core/trunk/hdl
25 Updated filelists according to the new OpenSPARC 1.4, and add some minor
changes like Stephen Williams's suggestion to use $(S1_ROOT) in the filelists
for Icarus Verilog (he's the author!).		 fafa1971 6514d 13h /s1_core/trunk/hdl
24 Fresh files taken from most recent OpenSPARC 1.4. fafa1971 6514d 13h /s1_core/trunk/hdl
23 Fresh file taken from the most recent OpenSPARC 1.4. fafa1971 6514d 13h /s1_core/trunk/hdl
22 Removed files of OpenSPARC 1.3 to later add the 1.4 ones. fafa1971 6514d 13h /s1_core/trunk/hdl
21 Removed files of OpenSPARC 1.3 to later add version 1.4 ones. fafa1971 6514d 14h /s1_core/trunk/hdl
20 Removed all the files of OpenSPARC 1.3 to later add the 1.4 ones. fafa1971 6514d 14h /s1_core/trunk/hdl
19 *** empty log message *** fafa1971 6514d 14h /s1_core/trunk/hdl
12 Updated the PCX/CPX fields description with all the info required for debugging. fafa1971 6575d 09h /s1_core/trunk/hdl

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