URL https://opencores.org/ocsvn/s1_core/s1_core/trunk

Subversion Repositories s1_core

[/] [s1_core/] [trunk/] [hdl/] - Rev 91

Rev	Log message	Author	Age	Path
44	Embedded `defines into Verilog source since did not find command line option for XST	fafa1971	6500d 10h	/s1_core/trunk/hdl
39	Empty modules for cacheless Simply RISC S1 Core	fafa1971	6500d 10h	/s1_core/trunk/hdl
25	Updated filelists according to the new OpenSPARC 1.4, and add some minor changes like Stephen Williams's suggestion to use $(S1_ROOT) in the filelists for Icarus Verilog (he's the author!).	fafa1971	6514d 13h	/s1_core/trunk/hdl
24	Fresh files taken from most recent OpenSPARC 1.4.	fafa1971	6514d 13h	/s1_core/trunk/hdl
23	Fresh file taken from the most recent OpenSPARC 1.4.	fafa1971	6514d 13h	/s1_core/trunk/hdl
22	Removed files of OpenSPARC 1.3 to later add the 1.4 ones.	fafa1971	6514d 13h	/s1_core/trunk/hdl
21	Removed files of OpenSPARC 1.3 to later add version 1.4 ones.	fafa1971	6514d 13h	/s1_core/trunk/hdl
20	Removed all the files of OpenSPARC 1.3 to later add the 1.4 ones.	fafa1971	6514d 13h	/s1_core/trunk/hdl
19	* empty log message *	fafa1971	6514d 13h	/s1_core/trunk/hdl
12	Updated the PCX/CPX fields description with all the info required for debugging.	fafa1971	6575d 09h	/s1_core/trunk/hdl