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[/] [s1_core/] [trunk/] [hdl] - Rev 45

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Rev Log message Author Age Path
45 I'm going to remove original OpenSPARC 1.4 files so that I can insert again
the ones with Icarus Verilog preprocessor already applied by update_sparccore
(it seems that Xilinx's XST does NOT support defines at compile time)		 fafa1971 6522d 06h /s1_core/trunk/hdl
44 Embedded `defines into Verilog source since did not find command line option for XST fafa1971 6523d 05h /s1_core/trunk/hdl
39 Empty modules for cacheless Simply RISC S1 Core fafa1971 6523d 05h /s1_core/trunk/hdl
25 Updated filelists according to the new OpenSPARC 1.4, and add some minor
changes like Stephen Williams's suggestion to use $(S1_ROOT) in the filelists
for Icarus Verilog (he's the author!).		 fafa1971 6537d 07h /s1_core/trunk/hdl
24 Fresh files taken from most recent OpenSPARC 1.4. fafa1971 6537d 07h /s1_core/trunk/hdl
23 Fresh file taken from the most recent OpenSPARC 1.4. fafa1971 6537d 07h /s1_core/trunk/hdl
22 Removed files of OpenSPARC 1.3 to later add the 1.4 ones. fafa1971 6537d 07h /s1_core/trunk/hdl
21 Removed files of OpenSPARC 1.3 to later add version 1.4 ones. fafa1971 6537d 07h /s1_core/trunk/hdl
20 Removed all the files of OpenSPARC 1.3 to later add the 1.4 ones. fafa1971 6537d 07h /s1_core/trunk/hdl
19 *** empty log message *** fafa1971 6537d 08h /s1_core/trunk/hdl
12 Updated the PCX/CPX fields description with all the info required for debugging. fafa1971 6598d 03h /s1_core/trunk/hdl
11 Corrected the bug about the packet format, now we are near to perfection... fafa1971 6598d 06h /s1_core/trunk/hdl
9 First release. fafa1971 6619d 04h /s1_core/trunk/hdl
6 First version (from OpenSPARC 1.1.3). fafa1971 6619d 04h /s1_core/trunk/hdl
4 First version. fafa1971 6619d 04h /s1_core/trunk/hdl
3 First release. fafa1971 6619d 04h /s1_core/trunk/hdl

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