URL https://opencores.org/ocsvn/s6soc/s6soc/trunk

Subversion Repositories s6soc

[/] [s6soc/] [trunk/] [rtl/] [cpu/] - Rev 20

Rev	Log message	Author	Age	Path
16	Bug fix. This release fixes several bugs associated with transitioning from user mode to supervisor mode while running from flash memory. This also rewires TIMER-B into a watch-dog timer, and adjusts the LED's to be an indicator of interrupts and whether or not the CPU has stalled or not as well.	dgisselq	2911d 06h	/s6soc/trunk/rtl/cpu/
11	Runs on hardware now! Added proper pinouts, pipelined wishbone command interface sufficient for loading the flash, a loader to load the flash, and verified that they work.	dgisselq	2918d 19h	/s6soc/trunk/rtl/cpu/
8	First pseudo-running version. The alternate configuration (not the main one) has been initially tested. wbregs works for reading/writing registers, so it is now possible to test the peripherals.	dgisselq	2923d 19h	/s6soc/trunk/rtl/cpu/
7	Created/added an initial specification. Updated/corrected several copywrite notices.	dgisselq	2924d 10h	/s6soc/trunk/rtl/cpu/
4	Lots of updates, as part of actually making this work on hardware. Not there yet, so this is still pre-alpha.	dgisselq	2945d 05h	/s6soc/trunk/rtl/cpu/
2	The initial check in--all the files that will make this SoC work.	dgisselq	2956d 00h	/s6soc/trunk/rtl/cpu/