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[/] [s6soc/] [trunk/] [sw/] - Rev 28

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27 Added a bootloader capability so that pieces of the program may be immediately
loaded into RAM. Further, the custom linker script, cmodram.ld, has been
added to dispatch object files to either FLASH or RAM. Finally, for those
items that were headed to RAM, their support files have been split between
RAM and FLASH code: kernel.c/ksetup.c, syspipe.c/pipesetup.c, etc.
dgisselq 2879d 22h /s6soc/trunk/sw/
26 Modified to be able to handle different load from virtual addresses. This
enables the bootloader capability.
dgisselq 2879d 22h /s6soc/trunk/sw/
22 Initial version of the ZipOS operating system construct(s). dgisselq 2883d 20h /s6soc/trunk/sw/
21 Adds two device drivers: one for the SPI display, and another for the pseudo
device that simulates the Real-Time Clock.
dgisselq 2883d 21h /s6soc/trunk/sw/
20 This linker description file acknowledges a .fixdata section which can be
used for debug data upon startup. This allows a startup function to write
all registers out, without destroying them or modifying them on the way.
dgisselq 2883d 21h /s6soc/trunk/sw/
19 Addition of dumpuart.cpp to dump the UART transactions to a FILE (method of
debugging the board). FLASHDRVR and ZIPLOAD were also updated to handle
loading ELF files where the code is longer than a single block.
dgisselq 2883d 21h /s6soc/trunk/sw/
15 Adds a new program and a new device: doorbell2 and the PmodCLS display. This
also includes a real-time clock simulator--since we couldn't fit it on the
board.
dgisselq 2889d 14h /s6soc/trunk/sw/
14 Modified the loader so that it will load even if there are RAM variables
in the load, just as long as they aren't anything but zero. (The startup code,
however, doesn't clear memory to match--so be sure to initialize all variables.)
dgisselq 2889d 14h /s6soc/trunk/sw/
12 The UART and PWM audio now work. This includes the changes to make that
happen, as well as the source code for some UART and PWM demo programs.
dgisselq 2890d 12h /s6soc/trunk/sw/
11 Runs on hardware now! Added proper pinouts, pipelined wishbone command
interface sufficient for loading the flash, a loader to load the flash,
and verified that they work.
dgisselq 2891d 10h /s6soc/trunk/sw/
8 First pseudo-running version. The alternate configuration (not the main one)
has been initially tested. wbregs works for reading/writing registers,
so it is now possible to test the peripherals.
dgisselq 2896d 11h /s6soc/trunk/sw/

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