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Rev Log message Author Age Path
22 Pad sdram clock added dinesha 4472d 16h /
21 Clean up dinesha 4472d 16h /
20 8 Bit SDARM support is added dinesha 4474d 11h /
19 8 Bit SDRAM Support added dinesha 4474d 11h /
18 8 Bit SDRAM Support is added dinesha 4474d 11h /
17 micron 8 bit memory models are added into svn dinesha 4474d 11h /
16 8 Bit SDRAM Support is added dinesha 4474d 11h /
15 Port cleanup dinesha 4477d 12h /
14 Unnecessary device config are removed dinesha 4477d 12h /
13 column bit are made progrmmable dinesha 4477d 12h /
12 Column Bits are made programmable dinesha 4477d 13h /
11 SDRAM Specification document added into SVN dinesha 4480d 13h /
10 Waveform files are added into SVN dinesha 4480d 13h /
9 SDR Bus width parameter passing issue across the models are fixed dinesha 4481d 13h /
8 test bench files are added into SVN dinesha 4481d 13h /
7 SDRAM Memory Models are added into SVN dinesha 4481d 13h /
6 Golden Log files are added into SVN dinesha 4481d 13h /
5 Run files are updated into SVN dinesha 4481d 13h /
4 Sdram controller RTL bug fixes done for 16bit SDR Mode dinesha 4482d 10h /
3 SDRAM controller core files are checked in dinesha 4488d 21h /

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