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Rev Log message Author Age Path
28 SDRAM top and SDRAM Core Golden files are added into SVN dinesha 4257d 22h /
27 Golden log file corresponds the SDRAM core level test case are added into svn dinesha 4258d 20h /
26 invalid log files are removed dinesha 4258d 20h /
25 is renamed as tb_top dinesha 4258d 20h /
24 Clean Up dinesha 4258d 20h /
23 Pad sdram clock added and read path register w.r.t pad sdram clock dinesha 4260d 02h /
22 Pad sdram clock added dinesha 4260d 02h /
21 Clean up dinesha 4260d 02h /
20 8 Bit SDARM support is added dinesha 4261d 20h /
19 8 Bit SDRAM Support added dinesha 4261d 20h /
18 8 Bit SDRAM Support is added dinesha 4261d 20h /
17 micron 8 bit memory models are added into svn dinesha 4261d 21h /
16 8 Bit SDRAM Support is added dinesha 4261d 21h /
15 Port cleanup dinesha 4264d 21h /
14 Unnecessary device config are removed dinesha 4264d 21h /
13 column bit are made progrmmable dinesha 4264d 22h /
12 Column Bits are made programmable dinesha 4264d 22h /
11 SDRAM Specification document added into SVN dinesha 4267d 22h /
10 Waveform files are added into SVN dinesha 4267d 23h /
9 SDR Bus width parameter passing issue across the models are fixed dinesha 4268d 22h /

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