OpenCores
URL https://opencores.org/ocsvn/sdr_ctrl/sdr_ctrl/trunk

Subversion Repositories sdr_ctrl

[/] [sdr_ctrl/] - Rev 29

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
29 SDRAM top and core related run file list are added into svn dinesha 4887d 05h /sdr_ctrl/
28 SDRAM top and SDRAM Core Golden files are added into SVN dinesha 4887d 05h /sdr_ctrl/
27 Golden log file corresponds the SDRAM core level test case are added into svn dinesha 4888d 03h /sdr_ctrl/
26 invalid log files are removed dinesha 4888d 03h /sdr_ctrl/
25 tb.sv is renamed as tb_top dinesha 4888d 03h /sdr_ctrl/
24 Clean Up dinesha 4888d 03h /sdr_ctrl/
23 Pad sdram clock added and read path register w.r.t pad sdram clock dinesha 4889d 09h /sdr_ctrl/
22 Pad sdram clock added dinesha 4889d 09h /sdr_ctrl/
21 Clean up dinesha 4889d 09h /sdr_ctrl/
20 8 Bit SDARM support is added dinesha 4891d 03h /sdr_ctrl/
19 8 Bit SDRAM Support added dinesha 4891d 03h /sdr_ctrl/
18 8 Bit SDRAM Support is added dinesha 4891d 04h /sdr_ctrl/
17 micron 8 bit memory models are added into svn dinesha 4891d 04h /sdr_ctrl/
16 8 Bit SDRAM Support is added dinesha 4891d 04h /sdr_ctrl/
15 Port cleanup dinesha 4894d 04h /sdr_ctrl/
14 Unnecessary device config are removed dinesha 4894d 04h /sdr_ctrl/
13 column bit are made progrmmable dinesha 4894d 05h /sdr_ctrl/
12 Column Bits are made programmable dinesha 4894d 05h /sdr_ctrl/
11 SDRAM Specification document added into SVN dinesha 4897d 06h /sdr_ctrl/
10 Waveform files are added into SVN dinesha 4897d 06h /sdr_ctrl/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2025 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.