URL https://opencores.org/ocsvn/sdr_ctrl/sdr_ctrl/trunk

Subversion Repositories sdr_ctrl

[/] [sdr_ctrl/] - Rev 36

Rev	Log message	Author	Age	Path
16	8 Bit SDRAM Support is added	dinesha	4474d 00h	/sdr_ctrl/
15	Port cleanup	dinesha	4477d 01h	/sdr_ctrl/
14	Unnecessary device config are removed	dinesha	4477d 01h	/sdr_ctrl/
13	column bit are made progrmmable	dinesha	4477d 01h	/sdr_ctrl/
12	Column Bits are made programmable	dinesha	4477d 01h	/sdr_ctrl/
11	SDRAM Specification document added into SVN	dinesha	4480d 02h	/sdr_ctrl/
10	Waveform files are added into SVN	dinesha	4480d 02h	/sdr_ctrl/
9	SDR Bus width parameter passing issue across the models are fixed	dinesha	4481d 02h	/sdr_ctrl/
8	test bench files are added into SVN	dinesha	4481d 02h	/sdr_ctrl/
7	SDRAM Memory Models are added into SVN	dinesha	4481d 02h	/sdr_ctrl/