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[/] [sdr_ctrl/] [trunk/] [rtl/] [core/] [sdrc_bs_convert.v] - Rev 37

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Rev Log message Author Age Path
37 SDRAM dq and sdram pad clock are termindated inside the top rtl files dinesha 4440d 18h /sdr_ctrl/trunk/rtl/core/sdrc_bs_convert.v
31 Integrated SDRAM controller with wishbone interface is added into SVN dinesha 4443d 10h /sdr_ctrl/trunk/rtl/core/sdrc_bs_convert.v
16 8 Bit SDRAM Support is added dinesha 4447d 09h /sdr_ctrl/trunk/rtl/core/sdrc_bs_convert.v
4 Sdram controller RTL bug fixes done for 16bit SDR Mode dinesha 4455d 08h /sdr_ctrl/trunk/rtl/core/sdrc_bs_convert.v
3 SDRAM controller core files are checked in dinesha 4461d 18h /sdr_ctrl/trunk/rtl/core/sdrc_bs_convert.v

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