URL https://opencores.org/ocsvn/sdr_ctrl/sdr_ctrl/trunk

Subversion Repositories sdr_ctrl

[/] [sdr_ctrl/] [trunk/] [rtl/] [core/] [sdrc_bs_convert.v] - Rev 37

Rev	Log message	Author	Age	Path
37	SDRAM dq and sdram pad clock are termindated inside the top rtl files	dinesha	5059d 10h	/sdr_ctrl/trunk/rtl/core/sdrc_bs_convert.v
31	Integrated SDRAM controller with wishbone interface is added into SVN	dinesha	5062d 02h	/sdr_ctrl/trunk/rtl/core/sdrc_bs_convert.v
16	8 Bit SDRAM Support is added	dinesha	5066d 01h	/sdr_ctrl/trunk/rtl/core/sdrc_bs_convert.v
4	Sdram controller RTL bug fixes done for 16bit SDR Mode	dinesha	5074d 00h	/sdr_ctrl/trunk/rtl/core/sdrc_bs_convert.v
3	SDRAM controller core files are checked in	dinesha	5080d 11h	/sdr_ctrl/trunk/rtl/core/sdrc_bs_convert.v