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[/] [spacewire_light/] [trunk/] [bench/] [vhdl/] [spwlink_tb.vhd] - Rev 11

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Rev Log message Author Age Path
11 spwrecvfront_generic.vhd: Correctly handle situation where incoming Data/Strobe signals are not '0' at the beginning of the link setup.
Many thanks to Goekce Aydos for reporting this bug.
jorisvr 4328d 16h /spacewire_light/trunk/bench/vhdl/spwlink_tb.vhd
7 * spwamba: Add tick_out signal.
* spwrecvfront_fast: Simplified data transfer between clock domains.
* Clean up synchronization of data paths between clock domains.
* Upgrade to GRLIB 1.1.0.
jorisvr 5052d 18h /spacewire_light/trunk/bench/vhdl/spwlink_tb.vhd
2 Initial check-in. jorisvr 5300d 22h /spacewire_light/trunk/bench/vhdl/spwlink_tb.vhd

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