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[/] [uart2bus/] [trunk/] [doc/] [UART to Bus Core Specifications.pdf] - Rev 12

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12 Updated Verilog implementation to sync with VHDL to include internal bus request/grant mechanism. motilito 4415d 10h /uart2bus/trunk/doc/UART to Bus Core Specifications.pdf
8 Updated core description document to include Lattice device synthesis results. motilito 4731d 15h /uart2bus/trunk/doc/UART to Bus Core Specifications.pdf
4 Corrected some problems in the binary mode protocol test bench.
Updated documentation.
motilito 5109d 01h /uart2bus/trunk/doc/UART to Bus Core Specifications.pdf
2 Uploaded the initial project version. motilito 5155d 08h /uart2bus/trunk/doc/UART to Bus Core Specifications.pdf

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